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AK8856VN Datasheet(PDF) 4 Page - Asahi Kasei Microsystems |
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AK8856VN Datasheet(HTML) 4 Page - Asahi Kasei Microsystems |
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4 / 98 page  ASAHI KASEI [AK8856VN] MS0522-E-00 4 2006/Dec Pin Description Pin Pin Name A/D/P I/O Functional Outline 1 NC No connection – leave floating - Reserved for AKM testing 2 NC No connection – leave floating - Reserved for AKM testing 3 AVDD A P Analog power supply 4 AVSS A G Analog ground 5 AIN2 A I Analog input pin (2) ; if not used, leave floating 6 DVSS D G Digital ground pins 7 DVDD D P Digital power supply 8 NSIG P O Indicates synchronization condition with input signal - L : synchronized with input signal - H : no signal input or out of synchronization - output state is controlled by combinations of RSTN/PDN/OE pin settings (note 1 9 TEST2 P I/O Reserved – leave floating 10 DVALID P O Valid video interval - output state is controlled by combinations of RSTN/PDN/OE pin settings (note 1) 11 NC No connection – leave floating - Reserved for AKM testing 12 NC No connection – leave floating - Reserved for AKM testing 13 NC No connection – leave floating - Reserved for AKM testing 14 VD/VAF /FIELD P I/O VD/VAF/FIELD timing signal output - selection of VD/VAF signal output and FIELD signal output is determined by register setting - in camera I/F mode, VAF signal is always output - output state is controlled by combinations of RSTN/PDN/OE pin settings (note 1) - this pin is used as an I/O pin in test mode 15 HD/HV P O HD/HV timing signal output - output state is controlled by combinations of RSTN/PDN/OE pin settings (note 1) 16 DATA7 P I/O Data output (MSB) - output state is controlled by combinations of RSTN/PDN/OE pin settings (note 1) - this pin is used as an I/O pin in test mode 17 DATA6 P O Data output - output state is controlled by combinations of RSTN/PDN/OE pin settings (note 1) 18 DATA5 P I/O Data output - output state is controlled by combinations of RSTN/PDN/OE pin settings (note 1) - this pin is used as an I/O pin in test mode 19 DATA4 P O Data output pin - output state is controlled by combinations of RSTN/PDN/OE pin settings (note 1) 20 DATA3 P I/O Data output - output state is controlled by combinations of RSTN/PDN/OE pin settings (note 1) - this pin is used as an I/O pin in test mode 21 DATA2 P O Data output pin - output state is controlled by combinations of RSTN/PDN/OE pin settings (note 1) |
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