[AK4145]

MS0982-E-01

2010/09

- 11 -

Data is shifted in via the SDTI pin using BICK and LRCK inputs. In serial control mode (P/S pin = “L”), the DIF0-2 bits

select five serial data modes as shown in Table 5. In parallel control mode (P/S pin = “H”), the DIF pin select two serial

data modes as shown in Table 6. In all modes the serial data is MSB-first, 2’s compliment format and it is latched on the

rising edge of BICK. Mode 2 can be used for 16/20 MSB justified formats by zeroing the unused LSBs.

Mode

DIF2

Bit

DIF1

Bit

DIF0

bit

SDTI Format

BICK

Figure

0

0

0

0

16bit LSB Justified

≥32fs

Figure 1

1

0

0

1

20bit LSB Justified

≥40fs

Figure 2

2

0

1

0

24bit MSB Justified

≥48fs

Figure 3

3

0

1

1

16/24bit I

32fs or

≥48fs

Figure 4

(default)

4

1

0

0

24bit LSB Justified

≥48fs

Figure 2

Table 5. Audio Data Formats (Serial control mode)

Mode

DIF

pin

SDTI Format

BICK

Figure

2

0

24bit MSB Justified

≥48fs

Figure 3

3

1

16/24bit I

32fs or

≥48fs

Figure 4

Table 6. Audio Data Formats (Parallel control mode)

SDTI

BICK

LRCK

SDTI

15

14

6

5

4

BICK

0

1

10

11

12

13

14

15

0

1

10

11

12

13

14

15

0

1

3

2

1

0

15

14

(32fs)

(64fs)

014

1

15

16

17

31

0

1

14

15

16

17

31

0

1

15

14

0

15

14

0

Mode 0

Don’t care

Don’t care

15:MSB, 0:LSB

Mode 0

15

14

6

5

4

3

2

1

0

Lch Data

Rch Data

Figure 1. Mode 0 Timing