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TLK2208A Datasheet(PDF) 5 Page - Texas Instruments |
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TLK2208A Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 40 page  TLK2208A 8PORT GIGABIT ETHERNET TRANSCEIVER 5 WWW.TI.COM Signal Terminal Description Serial I/O Signals SIGNAL LOCATION TYPE DESCRIPTION TX[A:H]+ TX[A:H]– H16:A16 H15:A15 VML output Differential output transmit. TX[A:H]+ and TX[A:H]– are differential serial outputs that interface to a copper or an optical I/F module. TX[A:H]+ and TX[A:H]– are put in a high-impedance state when LPBK = high or when the LOOPBACK bit for a particular channel in the MDIO registers is set. RX[A:H]+ RX[A:H]– U16:K16 U15:K15 PECL- compatible input Differential input receive. RX[A:H]+ and RX[A:H]– together are the differential serial input interface from a copper or an optical I/F module. Differential resistive termination is built-in for these terminals. Transmit Data Bus and Clock Signals SIGNAL LOCATION TYPE DESCRIPTION REFCLK C12 LVCMOS input Reference clock. REFCLK is an external input clock that provides the clock reference for synchronizing the receiver and transmitter interfaces. REFCLK is supposed to run from 100 MHz up to 130 MHz for 1 Gbps up to 1.3 Gbps operation of the serial interface. TCLKB E3 LVCMOS input with P/U Transmit data clock. When in synchronized channel modes, the data on TDBA[9:0], TDDC[9:0], TDFE[9:0] and TDHG[9:0] is latched on both the rising and falling edges of TCLKB. When in independent channel modes, TCLKB latches TDBA[9:0] data on both its rising and falling edges. TCKD, TCKF, TCKH C4, C5, C6 LVCMOS input with P/U Transmit data clock channels C and D, E and F, G and H. When in independent channel mode, these terminals are used to latch data for their perspective channels on both the rising and falling edges. TCKD applies to channels C and D, TCKF applies to channels E and F, and TCKH applies to channels G and H. TDBA[7:0] G2, G1, F2, F1, E2, E1, D2, D1 LVCMOS input Transmit data channels A and B. The parallel data is clocked into the transceiver on the rising and falling edges of TCLKB and transmitted as a serial stream with TDBA0 sent as the first bit. In multiplexed channel mode, data for channel B is aligned to the rising edge of TCLKB and data for channel A is aligned to the falling edge of TCLKB. In nibble interface mode, data is input least-significant nibble first, aligned to the falling edge of TCLKB, followed by the most-significant nibble aligned to the rising edge. When CODE = high, TDBA3 acts as the K-character indicator for channel A. TDBA8 H2 LVCMOS input Transmit data, K-generator channels A and B. In multiplexed channel mode, when CODE = low, this terminal is the 9th bit of a 10-bit word to be transmitted. When CODE = high, this terminal acts as the K-character indicator. When TDBA8 = high, the data on TDBA[7:0] is encoded into a K-character. In nibble interface mode, when CODE = low, this terminal is the 4th and 9th bits of a 10-bit word to be transmitted on channel B. When CODE = high, this terminal acts as the K-character indicator for channel B. Data is latched on the rising and falling edges of TCLKB. TDBA9 H1 LVCMOS input with P/D Transmit data channels A and B. When CODE = low, this terminal is the 10th bit of a 10-bit word. When CODE = high, this terminal should be left floating or tied low to ground. Data is latched on the rising and falling edges of TCLKB. TDDC[7:0] D3, C3, B2, A2, A1, B1, C2, C1 LVCMOS input Transmit data channels C and D. The parallel data is clocked into the transceiver on the rising and falling edges of the transmit clock and transmitted as a serial stream with bit 0 sent as the first bit. In independent channel mode, the transmit clock that latches this input is TCLKD. In all other modes, the transmit clock is TCLKB. In multiplexed channel mode, data for channel D is aligned to the rising edge of the transmit clock and data for channel C is aligned to its falling edge. In nibble interface mode, data is input least-significant nibble first, aligned to the falling edge of the transmit clock, followed by the most-significant nibble aligned to the rising edge of the transmit clock. Channel C data is input on TDDC[4:0] and channel D on TDDC[9:5]. When CODE = high, TDDC3 acts as the K-character indicator for channel C. |
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