8

PS8894C

11/19/07

PI3HDMI431AR

Optimized Equalization for Enhanced Signal Integrity

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HDMI Licensing, LLC in the United States and other countries.

Symbol

Parameter

Test Conditions

Min.

Max.

Units

Supply Current

pattern, m = 2, 3, 4

A1/B1 = 165 MHz clock

190

230

mA

Power Dissipation

394

657

mW

TMDS Differential Pins (A/B; Y/Z)

Single-ended high-level output voltage

Pre-emphasis/De-emphasis = 0dB

10

10

mV

Single-ended low-level output voltage

- 600

- 400

Single-ended output swing voltage

400

600

Overshoot of output differential volt-

age

6%

15%

2x

Undershoot of output differential volt-

age

12%

25%

Change in steady-state common-mode

output voltage between logic states

0.5

5

mV

Short circuit output current

12

mA

3, 4

A1/B1 = 25 MHz clock

560

840

mVp-p

800

1200

Single-ended input voltage under high

impedance input or open input

- 10

mV

Input termination resistance

45

50

55

ohm

DDC I/O Pins (SCL, SCL_SINK, SDA, SDA_SINK)

Input leakage current

DDC ports

0.1

2

μA

Input/output capacitance

7.5

pF

Switch resistance

25

50

ohm

Switch output voltage

2.0

V

Status Pins (HPD)

0.4

V

Control Pins (OC_Sx, EQ_Sx, S, OE)

High-level digital input current

0.1

2

μA

Low-level digital input current

0.1

2

Status Pins (HPD_SINK)

High-level digital input current

23

100

μA

0.1

2

Low-level digital input current

0.1

2

Notes:

1. All typical values are at 25°C and with a 3.3V supply.

2. The value is tested in full temperature range at 3.0V.

3. The value is tested in full temperature range at 3.6V.

07-0255