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P89V662FA Datasheet(PDF) 9 Page - NXP Semiconductors |
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P89V662FA Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 89 page P89V660_662_664_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 29 January 2008 9 of 89 NXP Semiconductors P89V660/662/664 80C51 with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI [1] ALE loading issue: When ALE pin experiences higher loading (>30 pF) during the reset, the microcontroller may accidentally enter into modes other than normal working mode. The solution is to add a pull-up resistor of 3 k Ω to 50 kΩ to V DD, e.g., for ALE pin. [2] For 6-clock mode, ALE is emitted at 1 ⁄ 3 of crystal frequency. ALE/PROG 27 33 I/O Address Latch Enable: ALE is the output signal for latching the low byte of the address during an access to external memory. This pin is also the programming pulse input (PROG) for flash programming. Normally the ALE[1] is emitted at a constant rate of 1 ⁄ 6 the crystal frequency [2] and can be used for external timing and clocking. One ALE pulse is skipped during each access to external data memory. However, if AO is set to ‘1’, ALE is disabled. XTAL1 15 21 I Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator circuits. XTAL2 14 20 O Crystal 2: Output from the inverting oscillator amplifier. VDD 38 44 I Power supply VSS 16 22 I Ground Table 3. Pin description …continued Symbol Pin Type Description TQFP44 PLCC44 |
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