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EF6805R2 Datasheet(PDF) 9 Page - STMicroelectronics |
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EF6805R2 Datasheet(HTML) 9 Page - STMicroelectronics |
9 / 31 page Control. 0 - Cleared under Program Control. TCR3 - Timer prescaler reset bit : A read of TCR3 TCR5 TCR4 Result 0 0 1 1 0 1 0 1 Internal Clock to Timer AND of Internal Clock and TIMER Pin to Timer Input to timer disabled. TIMER Pin to Timer always indicates a zero. 1 - Set on external Reset, Power-On-Reset or under Program Control. 0 - Cleared under Program Control TCR2 TCR1 TCR0 Result 0 0 0 0 0 0 1 1 0 1 0 1 +1 +2 +4 +8 TCR2 TCR1 TCR0 Result 1 1 1 1 0 0 1 1 0 1 0 1 +16 +32 +64 +128 Figure 9 : Timer Control Register (TCR). TCR2 , TCR1, and TCR0 - Prescaler address bits : 1 - All set on external Reset, Power-On-Reset or under Program Control. 0 - Cleared under Program Control. Figure 10 : Timer Block Diagram. Notes : 1. Prescaler and 8-bit counter are clocked on the failing edge of the internal clock (AS) or external input. 2. Counter is written to during dat strobe (DS) and counts down continuously. SELF-CHECK - The self-check capability of the EF6805U3 MCU provides an internal check to de- termine if the part is functional. Connect the MCU as shown in figure 11 and monitor the output of Port C bit 3 for an oscillation of approximately 7Hz. A 10- volt level (through a 10k resistor) on the timer input, pin 8 and pressing then releasing the RESET but- ton, energizes the ROM-based self-check feature. The self-check program exercices the RAM, ROM, TIMER, interrupts, and I/O ports. Several of the self-check subroutines can be called by a user program with a JSR or BSR instruction. They are the RAM, ROM. The timer routine may also be called if the timer input is the internal 2 clock. To call those subroutines in customer application, please contact your local SGS-THOMSON Micro- electronics sales office in order to obtain the complete description of the self-check program and the entrance/exit conditions. RAM SELF-CHECK SUBROUTINE - The RAM self- check is called at location $F84 and returns with the Z bit clear if any error is detected ; otherwise the Z bit is set. The RAM test causes each byte to count from 0 up to 0 again with a check after each count. The RAM test must be called with the stack pointer at $07F and A = 0. When run, the test checks every RAM cell except for $07F and $07E which are as- sumed to contain the return address. EF6805U3 9/31 |
Similar Part No. - EF6805R2 |
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Similar Description - EF6805R2 |
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