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S-1000C20-N4T1G Datasheet(PDF) 22 Page - Seiko Instruments Inc |
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S-1000C20-N4T1G Datasheet(HTML) 22 Page - Seiko Instruments Inc |
22 / 38 page ULTRA-SMALL PACKAGE HIGH-PRECISION VOLTAGE DETECTOR S-1000 Series Rev.2.3_00 22 Seiko Instruments Inc. 2. Power-on reset circuit A power-on reset circuit can be constructed using Nch open-drain output product of S-1000 Series. (Nch open-drain products) OUT VIN VSS VDD S-1000N R *1 C*1 Di *2 *1. R should be 75 k Ω or less, and C should be 0.01 µF or more to prevent oscillation. If C is not connected, R should be 800 Ω or less. *2. Diode Di instantaneously discharges the charge stored in the capacitor (C) at the power falling, Di can be removed when the delay of the falling time is not important. Figure 26 VDD (V) t (s) OUT (V) t (s) Figure 27 Remark When the power rises sharply as shown in the Figure 28 left, the output may go to the high level for an instant in the undefined region where the output voltage is undefined since the power voltage is less than the minimum operation voltage. VDD (V) t (s) OUT (V) t (s) Figure 28 Caution The above connection diagram and constants do not guarantee correct operation. Perform sufficient evaluation using the actual application to set the constants. |
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