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EVB71122

300 to 930MHz Receiver

Evaluation Board Description

39012 71122 01

Page 2 of 32

EVB Description

Rev. 001

Sept/06

Document Content

1

Theory of Operation ...................................................................................................4

1.1

General ............................................................................................................................. 4

1.2

EVB Data Overview .......................................................................................................... 4

1.3

Block Diagram .................................................................................................................. 5

1.4

Enable/Disable in ABC Mode ........................................................................................... 6

1.5

Demodulation Selection in ABC Mode.............................................................................. 6

1.6

Programming Modes ........................................................................................................ 6

1.7

Preconfigured Frequencies in ABC Mode ........................................................................ 6

2

Functional Description ..............................................................................................7

2.1

Frequency Planning.......................................................................................................... 7

2.2

Calculation of Counter Settings ........................................................................................ 8

2.2.1

Calculation of LO1 and IF1 frequency for Low Frequency Bands............................................... 8

2.2.2

Calculation of LO1 and IF1 frequency for High Frequency Bands .............................................. 9

2.2.3

Counter Setting Examples for SPI Mode ..................................................................................... 9

2.2.4

Counter Settings in ABC Mode – 8 Preconfigured Channels.................................................... 10

2.2.5

PLL Counter Ranges ................................................................................................................. 11

2.3

SPI Description ............................................................................................................... 11

2.3.1

General ...................................................................................................................................... 11

2.3.2

Read / Write Sequences ............................................................................................................ 12

2.3.3

Serial Programming Interface Timing ........................................................................................ 12

3

Register Description ................................................................................................13

3.1

Register Overview .......................................................................................................... 13

3.1.1

Control Word R0 ........................................................................................................................ 15

3.1.2

Control Word R1 ........................................................................................................................ 16

3.1.3

Control Word R2 ........................................................................................................................ 17

3.1.4

Control Word R3 ........................................................................................................................ 17

3.1.5

Control Word R4 ........................................................................................................................ 18

3.1.6

Control Word R5 ........................................................................................................................ 18

3.1.7

Control Word R6 ........................................................................................................................ 18

3.1.8

Control Word R7 (Read-only Register)...................................................................................... 19

4

Application Circuits .................................................................................................20

4.1

Standard FSK & ASK Circuit in SPI Mode...................................................................... 20

4.1.1

Averaging Data Slicer Configured for Bi-Phase Codes............................................................. 20

4.1.2

Component Arrangement Top Side for SPI Mode (Averaging Data Slicer) .............................. 21

4.1.3

Peak Detector Data Slicer Configured for NRZ Codes ............................................................. 22

4.1.4

Component Arrangement Top Side for SPI Mode (Peak Detector Data Slicer)........................ 23

4.1.5

Board Component Values List (SPI mode)................................................................................ 24