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EVB72036

868/915MHz FSK/ASK Transmitter

Evaluation Board Description

3901272036 01

Page 6 of 12

EVB Description

Rev. 002

June/07

2.8

Mode Control Logic

The mode control logic allows two different

modes of operation as listed in the following

table. The mode control pin EN is pulled-down

internally. This guarantees that the whole circuit

is shut down if this pin is left floating.

EN

Mode

Description

0

TX standby

TX disabled

1

TX active

CKOUT active

TX / CKOUT

enabled

2.9

Clock Output

The clock output CKOUT is CMOS-compatible and can be used to drive a microcontroller. The frequency of

the clock can be changed by the clock divider control signal CKDIV, that can be selected according to the

following table. A capacitor at pin CKOUT can be used to control the clock voltage swing and the spurious

emission.

CKDIV

Clock divider ratio

0

4

3.39 MHz

1

16

848 kHz

2.10 Timing Diagrams

transmitter start-up time. The crystal oscillator starts oscillation and the PLL locks to the desired output fre-

and then the RF carrier can be FSK or ASK modulated.

Fig. 5:

Timing diagrams for FSK and ASK modulation

For more detailed information, please refer to the latest TH72036 data sheet revision.

RF carrier

low

low

high

high

LOCK

FSKDTA

t

low

high

EN

EN

low

low

high

high

LOCK

PSEL

t

low

high