SDRAM Buffer - 2 DIMM (Mobile)

W40S11-02

Rev 1.0, Dec. 01, 2006

Page 1 of 9

2200 Laurelwood Road, Santa Clara, CA 95054

Tel:(408) 855-0555

Fax:(408) 855-0550

www.SpectraLinear.com

Features

• Ten skew-controlled CMOS outputs (SDRAM0:9)

• Supports two SDRAM DIMMs

• Ideal for high-performance systems designed around

Intel®’s latest mobile chip set

• SMBus serial configuration interface

• Skew between any two outputs is less than 250 ps

• 1 to 5 ns propagation delay

• DC to 133-MHz operation

• Single 3.3V supply voltage

• Low power CMOS design packaged in a 28-pin, 209-mil

SSOP (Shrink Small Outline Package)

Overview

The Cypress W40S11-02 is a low-voltage, ten-output clock

buffer. Output buffer impedance is approximately 15 , which

is ideal for driving SDRAM DIMMs.

Key Specifications

Operating Temperature:.................................... 0°C to +70°C

Input Threshold: ...................................................1.5V typical

Input Frequency:............................................... 0 to 133 MHz

BUF_IN to SDRAM0:9 Propagation Delay:........ 1.0 to 5.0 ns

Output Edge Rate: ................................................. >1.5 V/ns

Output Skew: ............................................................ ±250 ps

Output Duty Cycle:................................... 45/55% worst case

Output Impedance: ....................................... 15 ohms typical

Output Type: ............................................... CMOS rail-to-rail

Pin Configuration

Block Diagram

Note:

1. Internal pull-up resistor of 250K on SDATA, SCLOCK, and OE in-

[1]

[1]

SDRAM1

SDRAM2

SDRAM3

SDRAM4

SDRAM5

SDRAM6

SDRAM7

SDRAM8

SDRAM9

SDRAM0

Serial Port

SCLOCK

SDATA

Device Control

BUF_IN

OE

VDD

SDRAM0

SDRAM1

GND

VDD

SDRAM2

SDRAM3

GND

BUF_IN

VDD

SDRAM8

GND

VDD

SDATA

VDD

SDRAM7

SDRAM6

GND

VDD

SDRAM5

SDRAM4

GND

OE

VDD

SDRAM9

GND

GND

SCLOCK

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

[1]