CY2SSTV857-27

Rev 1.0, November 21, 2006

Page 7 of 8

(all outputs)

325

ns

(all outputs)

38

ns

f > 66 MHz

–75

–

75

ps

tjit(h-per)

f > 66 MHz

–100

–

100

ps

Low-to-High Propagation Delay, CLK to Y

Test Mode only

1.5

3.5

7.5

ns

High-to-Low Propagation Delay, CLK to Y

1.5

3.5

7.5

ns

100

ps

–50

50

ps

Notes:

12. Refers to transition of non-inverting output.

13. Period jitter and half-period jitter specifications are separate specifications that must be met independently of each other.

14. All differential input and output terminals are terminated with 120 /16 pF, as shown in Figure 5.

[9, 10]

Parameter

Description

Condition

Min.

Typ.

Max.

Unit