CY28510

Rev 1.0, November 20, 2006

Page 3 of 12

Serial Data Interface

To enhance the flexibility and function of the clock synthesizer,

a two-signal serial interface is provided. Through the Serial

Data Interface, various device functions, such as individual

clock output buffers, can be individually enabled or disabled.

The registers associated with the Serial Data Interface

initialize to their default setting upon power-up, therefore use

of this interface is optional. Clock device register changes are

normally made upon system initialization, yet the interface is

available at any time except power-down.

Data Protocol

The clock driver serial protocol accepts Byte Write, Byte Read,

Block Write, and Block Read operation from the controller. For

Block Write/Read operation, the bytes must be accessed in

sequential order from lowest to highest byte (most significant

bit first) with the ability to stop after any complete byte has

been transferred. For Byte Write and Byte Read operations,

the system controller can access individual indexed bytes. The

offset of the indexed byte is encoded in the command code,

as described in Table 1. The Block Write and Block Read

protocol is outlined in Table 2, while Table 3 outlines the corre-

sponding byte write and byte read protocol.

The slave receiver address can be D0, D2, D4, or D6

depending on the state of the ADDSEL(0:1) pins.

Table 1. Command Code Definition

Bit

Description

7

0 = Block read or block write operation

1 = Byte read or byte write operation

(6:0)

Byte offset for byte read or byte write operation. For block read or block write operations, these bits should

be '0000000'

Table 2. Block Read and Block Write Protocol

Block Write Protocol

Block Read Protocol

Bit

Description

Bit

Description

1Start

1Start

2:8

Slave address – 7 bits

2:8

Slave address – 7 bits

9

Write = 0

9

Write = 0

10

Acknowledge from slave

10

Acknowledge from slave

11:18

Command Code – 8 bits

'00000000' stands for block operation

11:18

Command Code – 8 bits

'00000000' stands for block operation

19

Acknowledge from slave

19

Acknowledge from slave

20:27

Byte count from master – 8 bits

20

Repeat start

28

Acknowledge from slave

21:27

Slave address – 7 bits

29:36

Data byte 0 from master– 8 bits

28

Read = 1

37

Acknowledge from slave

29

Acknowledge from slave

38:45

Data byte 1 from master – 8 bits

30:37

Byte count from slave – 8 bits

46

Acknowledge from slave

38

Acknowledge

....

Data bytes from master/Acknowledge

39:46

Data byte 0 from slave – 8 bits

....

Data Byte N – 8 bits

47

Acknowledge

....

Acknowledge from slave

48:55

Data byte 1 from slave – 8 bits

....

Stop

56

Acknowledge

....

Data bytes from slave/acknowledge

....

Data byte N from slave – 8 bits

....

Not acknowledge

....

Stop