CY2277APAC-1M datasheet(1/18 Pages) SPECTRALINEAR

Part #	CY2277APAC-1M

Description	Pentium짰/II, 6x86, K6 Clock Synthesizer/Driver for Desktop/ Mobile PCs with Intel짰 82430TX and 2 DIMMs or 3 SO-DIMMs

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Manufacturer	SPECTRALINEAR [SpectraLinear Inc]

Direct Link	http://www.spectralinear.com

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Pentium®/II, 6x86, K6 Clock Synthesizer/Driver for Desktop/

Mobile PCs with Intel® 82430TX and 2 DIMMs or 3 SO-DIMMs

CY2277A

Rev 1.0, November 25, 2006

Page 1 of 18

2200 Laurelwood Road, Santa Clara, CA 95054

Tel:(408) 855-0555

Fax:(408) 855-0550

www.SpectraLinear.com

Y2277A

Features

• Mixed 2.5V and 3.3V operation

• Complete clock solution to meet requirements of

Pentium®, Pentium® II, 6x86, or K6 motherboards

— Four CPU clocks at 2.5V or 3.3V

— Up to eight 3.3V SDRAM clocks

— Seven 3.3V synchronous PCI clocks, one free

running

— Two 3.3V USB/IO clocks at 48 or 24 MHz, selectable

by serial interface

— One 2.5V IOAPIC clock at 14.318 MHz

— Two 3.3V Ref. clocks at 14.318 MHz

• Factory-EPROM programmable CPU, PCI, and USB/IO

clock frequencies for custom configuration

• Factory-EPROM programmable output drive and slew

rate for EMI customization

• MODE Enable pin for CPU_STOP and PCI_STOP

• SMBus serial configuration interface

• Available in space-saving 48-pin SSOP and TSSOP

packages.

Functional Description

The CY2277A is a Clock Synthesizer/Driver for Pentium,

Pentium II, 6X86, and K6 portable PCs designed with the Intel®

82430TX or similar chipsets. There are three available options

as shown in the selector guide

The CY2277A outputs four CPU clocks at 2.5V or 3.3V with up

to nine selectable frequencies. There are up to eight 3.3V

SDRAM clocks and seven PCI clocks, running at one half the

CPU clock frequency. One of the PCI clocks is free-running.

Additionally, the part outputs two 3.3V USB/IO clocks at 48

MHz or 24 MHz, one 2.5V IOAPIC clock at 14.318 MHz, and

two 3.3V reference clocks at 14.318 MHz. The CPU, PCI,

USB, and IO clock frequencies are factory-EPROM program-

mable for easy customization with fast turnaround times.

The CY2277A has power-down, CPU stop and PCI stop pins

for power management control. The CPU stop and PCI stop

are controlled by the MODE pin. They are multiplexed with

SDRAM clock outputs, and are selected when the MODE pin

is driven LOW. Additionally, these inputs are synchronized

on-chip,

enabling

glitch-free

transitions.

When

the

CPU_STOP input is asserted, the CPU outputs are driven

LOW. When the PCI_STOP input is asserted, the PCI outputs

(except the free-running PCI clock) are driven LOW. Finally,

when the PWR_DWN pin is asserted, the reference oscillator

and PLLs are shut down, and all outputs are driven LOW.

The CY2277A outputs are designed for low EMI emission.

Controlled rise and fall times, unique output driver circuits and

factory-EPROM programmable output drive and slew-rate

enable optimal configurations for EMI control.

.

EPROM

Pin Configuration

Logic Block Diagram

XTALOUT

XTALIN

IOAPIC (14.318 MHz)

14.318

MHz

OSC.

SDRAM[0–5]

SEL

SDRAM7/PCI_STOP

VDDQ2

CPU

PLL

MODE

SYS

PLL

/2

Delay

1

2

3

4

5

6

7

8

9

10

11

12

33

32

31

30

29

25

26

27

28

36

35

REF1

34

Top View

13

14

15

16

17

18

19

20

21

22

23

24

45

44

43

42

41

37

38

39

40

48

47

46

REF0

VSS

XTALIN

XTALOUT

MODE

VDDQ3

PCICLK_F

PCICLK0

VSS

PCICLK1

PCICLK2

PCICLK3

PCICLK4

VDDQ3

PCICLK5

VSS

SEL

SDATA

SCLK

VDDQ3

USBCLK/IOCLK

VSS

AVDD

PWR_SEL

VDDQ2

IOAPIC

PWR_DWN

VSS

CPUCLK0

CPUCLK1

VDDCPU

CPUCLK2

CPUCLK3

VSS

SDRAM0

SDRAM1

VDDQ3

SDRAM2

SDRAM3

VSS

SDRAM4

SDRAM5

VDDQ3

SDRAM6/CPU_STOP

SDRAM7/PCI_STOP

AVDD

SCLK

SDATA

REF [0–1]

(14.318)

CPUCLK[0–3]

VDDCPU

SDRAM6/CPU_STOP

PCI[0–5]

PCICLK_F

USBCLK/IOCLK[0:1]

STOP

INTERFACE

CONTROL

LOGIC

SERIAL

LOGIC

Divide and

Mux Logic

PWR_DWN

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