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CY28159 Datasheet(PDF) 3 Page - SpectraLinear Inc |
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CY28159 Datasheet(HTML) 3 Page - SpectraLinear Inc |
3 / 12 page CY28159 Rev 1.0, November 24, 2006 Page 3 of 12 Test Load Configuration The following shows test load configurations for the different Host Clock Outputs.(MULTsel1 = 0, MULTsel0 =1 Table 3. Group Offset Specifications Group Offset Comments CPU to 3V33 No requirement CPU to REF No requirement Table 4. Group Limits and Parameters (Applicable to all settings: Sel133/100#=x) Output Name Max Load CPU[(0:7)#] See Figure 1 REF 20 pF 3V33 30 pF CPUT MULTSEL T PCB T PCB CPUT# Measurement Point 2pF Measurement Point 2pF VDD Figure 1. 0.7V Test Load Termination CLOAD Probe Output Under Test Figure 2. Lumped Load Termination |
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