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OP467GS-REEL Datasheet(PDF) 6 Page - Analog Devices

Part # OP467GS-REEL
Description  Quad Precision, High Speed Operational Amplifier
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

OP467GS-REEL Datasheet(HTML) 6 Page - Analog Devices

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OP467
Rev. F | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter1
Rating
Supply Voltage2
±18 V
Input Voltage3
±18 V
Differential Input Voltage3
±26 V
Output Short-Circuit Duration
Limited
Storage Temperature Range
14-Lead CERDIP and 20-Terminal LCC
−65°C to +175°C
14-Lead PDIP and 16-Lead SOIC
−65°C to +150°C
Operating Temperature Range
OP467A
−55°C to +125°C
OP467G
−40°C to +85°C
Junction Temperature Range
14-Lead CERDIP and 20-Terminal LCC
−65°C to +175°C
14-Lead PDIP and 16-Lead SOIC
−65°C to +150°C
Lead Temperature (Soldering, 60 sec)
300°C
1 Absolute maximum ratings apply to both DICE and packaged parts, unless
otherwise noted.
2 For proper operation, the positive supply must be sequenced ON before the
negative supply.
3 For supply voltages less than ±18 V, the absolute maximum input voltage is
equal to the supply voltage.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 5.
Package Type
θJA1
θJC
Unit
14-Lead CERDIP (Y)
94
10
°C/W
14-Lead PDIP (P)
76
33
°C/W
16-Lead SOIC (S)
88
23
°C/W
20-Terminal LCC (RC)
78
33
°C/W
1 θJA is specified for the worst-case conditions, that is, θJA is specified for device
in socket for CERDIP, PDIP, and LCC packages, and θJA is specified for device
soldered in circuit board for the SOIC package.
DICE CHARACTERISTICS
1
2
3
4
5
67
8
10 +IN C
–IN C
+IN D
–IN D
9
–IN A
+IN A
+IN B
–IN B
V+
V–
11
12
13
14
Figure 5. 0.111 Inch × 0.100 Inch DIE Size, 11,100 sq. mils,
Substrate Connected to V+, 165 Transistors
ESD CAUTION


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