CY28316

Rev 1.0, November 20, 2006

Page 2 of 17

Pin Definitions

Pin Name

Pin No.

Pin Type

Pin Description

CPU0:1

44, 43

O

CPU Clock Output 0 through 1: CPU clocks for processor and chipset.

PCI2:6

9, 10, 11, 12,

13

O

PCI Clock Outputs 2 through 6: 3.3V 33-MHz PCI clock outputs. Frequency is

set by FS0:4 inputs or through serial data interface.

PCI1/FS3

7

I/O

Fixed PCI Clock Output/Frequency Select 3: 3.3V PCI clock outputs. As an

output, frequency is set by FS0:4 inputs or through the serial data interface. This

pin also serves as a power-on strap option to determine the device operating

frequency, as described in

Table 5.

PCI0/FS4

6

I/O

Fixed PCI Clock Output/Frequency Select 4: 3.3V PCI clock outputs. This pin

also serves as a power-on strap option to determine the device operating

frequency, as described in

Table 5.

RST#

41

O

(open-drain)

Reset# Output: Open drain system reset output.

48MHz/FS0

26

I/O

48-MHz Output/Frequency Select 0: 3.3V 48-MHz non-spread spectrum output.

This pin also serves as a power-on strap option to determine the device operating

frequency as described in

Table 5.

24_48MHz/

FS1

25

I/O

24_48MHz Output/Frequency Select 1: 3.3V 24- or 48-MHz non-spread

spectrum output. This pin also serves as a power-on strap option to determine the

device operating frequency, as described in

Table 5.

REF1/FS2

46

I/O

Reference Clock Output 1/Frequency Select 2: 3.3V 14.318-MHz output clock.

This pin also serves as a power-on strap option to determine the device operating

frequency as described in

Table 5.

REF0

47

O

Reference Clock Output 0: 3.3V 14.318-MHz output clock.

SDRAMIN

15

I

SDRAM Buffer Input Pin: Reference input for SDRAM buffer.

SDRAM0:12

38, 37, 35, 34,

32, 31, 29, 28,

21, 20, 18, 17,

40

O

SDRAM Outputs: These thirteen dedicated outputs provide copies of the signal

provided at the SDRAMIN input.

SCLK

24

I

Clock pin for SMBus circuitry.

SDATA

23

I/O

Data pin for SMBus circuitry.

X1

3

I

Crystal Connection or External Reference Frequency Input: This pin has dual

functions. It can be used as an external 14.318-MHz crystal connection or as an

external reference frequency input.

X2

4

O

Crystal Connection: An output connection for an external 14.318-MHz crystal. If

using an external reference, this pin must be left unconnected.

VTT_PWRGD#

48

I

VTT_PWRGD#: 3.3V LVTTL compatible input that controls the FS0:4 to be latched

and enables all outputs. CY28316 will sample the FS0:4 inputs and enable all clock

VDD_REF,

VDD_PCI,

VDD_SDRAM,

VDD_48MHz

1, 5, 14, 19,

27, 30, 36

P

Power Connection: Power supply for core logic, PLL circuitry, SDRAM outputs,

PCI outputs, reference outputs, 48-MHz output, and 24_48-MHz output. Connect

to 3.3V supply.

VDD_CPU

42

P

Power Connection: Power supply for CPU outputs. Connect to 2.5V supply.

GND_REF,

GND_PCI,

GND_SDRAM,

VDD_48MHz,

VDD_CPU

2, 8, 16, 22,

33, 39, 45

G

Ground Connections: Connect all ground pins to the common system ground

plane.