CY28347

Rev 1.0, November 20, 2006

Page 3 of 21

6

MODE/AGP0

VDDAGP I/O

PU

Power-on Bidirectional Input/Output. At power-up, MODE is an input and

becomes AGP0 output after the power supply voltage crosses the input threshold

voltage. Must have 10K

8

PCI_STP#

VDDAGP

I

PU

If pin 6 is pulled down at power on reset, then this pin becomes PCI_STP#.

When PCI_STP# is asserted LOW, then all of the PCI signals, except the PCI_F,

stops at the next HIGH to LOW transition or stays LOW if it already is LOW.

25

IREF

I

Current reference programming input for CPU buffers. A precise resistor is

attached to this pin, which is connected to the internal current reference.

28

SDATA

I/O Serial Data Input. Conforms to the SMBus specification of a Slave

Receive/Transmit device. It is an input when receiving data. It is an open drain output

when acknowledging or transmitting data.

27

SCLK

I

Serial Clock Input. Conforms to the SMBus specification.

26

PD#

I

PU

When PD# is asserted LOW, the device enters power down mode. See power

management function.

45

BUF_IN

I

2.5V CMOS type input to the DDR differential buffers.

46

FBOUT

O

This is the single-ended, SDRAM buffered output of the signal applied at

BUF_IN. It is in phase with the DDRT(0:5) signals.

5

VDDAGP

3.3V power supply for AGP clocks.

51

VDDC

3.3V power supply for CPU (T: C) clocks.

16

VDDPCI

3.3V power supply for PCI clocks.

55

VDDR

3.3V power supply for REF clock.

50

VDDI

2.5V power supply for CPUCS_T/C clocks.

22

VDD48M

3.3V power supply for 48M.

23

VDD

3.3V Common power supply.

34,40

VDDD

2.5V power supply for DDR clocks.

9

VSSAGP

Ground for AGP clocks.

13

VSSPCI

Ground for PCI clocks.

54

VSSC

Ground for CPU (T:C) clocks.

33,39

VSSD

Ground for DDR clocks.

19

VSS48M

Ground for 48M clock.

47

VSSI

Ground for CPUCS_T/C clocks.

24

VSS

Common ground.

Pin

Name

PWR

I/O

Description

Table 2. MODE Pin-Power Management Input Control

MODE, Pin 6

(Latched Input)

Pin 26

Pin 18

Pin 8

0

PD#

CPU_STP#

PCI_STP#

Invalid

Reserved

Reserved

Reserved

Table 3. Swing Select Functions Through Hardware

MULTSEL

Board Target

Trace/Term Z

Reference R,

IREF = VDD/(3*Rr)

Output Current

VOH@Z

0

50 Ohm

Rr = 221 1%,

IREF = 5.00 mA

IOH = 4* Iref

1.0V@50

1

50 Ohm

Rr = 475 1%,

IREF = 2.32 mA

IOH = 6* Iref

0.7V@50