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CY28349BOXCT Datasheet(PDF) 3 Page - SpectraLinear Inc |
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CY28349BOXCT Datasheet(HTML) 3 Page - SpectraLinear Inc |
3 / 20 page CY28349B Rev 1.0, November 20, 2006 Page 3 of 20 PWR_DWN# 42 I Power-down Control: 3.3V LVTTL compatible input that places the device in power down mode when held low. SCLK 26 I SMBus Clock Input: Clock pin for serial interface. SDATA 25 I/O SMBus Data Input: Data pin for serial interface. RST# 20 O (open-d rain) System Reset Output: Open-drain system reset output. IREF 35 I Current Reference for CPU Output: A precision resistor is attached to this pin which is connected to the internal current reference. VTT_PWRGD# 19 I Powergood from Voltage Regulator Module (VRM): 3.3V LVTTL input. VTT_PWRGD# is a level-sensitive strobe used to determine when FS0:4 and MULTSEL0:1 inputs are valid and OK to be sampled (Active LOW). Once VTT_PWRGD# is sampled LOW, the status of this input will be ignored. VDD_REF, VDD _PCI, VDD_48MHz, VDD_3V66, VDD_CPU 2, 9, 18, 24, 32, 39, 46 P 3.3V Power Connection: Power supply for CPU outputs buffers, 3V66 output buffers, PCI output buffers, reference output buffers and 48-MHz output buffers. Connect to 3.3V. GND_PCI, GND_48MHz, GND_3V66, GND_CPU, GND_REF, 5, 13, 21, 29, 36, 43, 47 G Ground Connection: Connect all ground pins to the common system ground plane. VDD_CORE 34 P 3.3V Analog Power Connection: Power supply for core logic, PLL circuitry. Connect to 3.3V. GND_CORE 33 G Analog Ground Connection: Ground for core logic, PLL circuitry. Pin Definitions (continued) Pin Name Pin No. Pin Type Pin Description |
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