CY28359

Rev 1.0, November 24, 2006

Page 4 of 7

Serial Configuration Map

• The Serial bits will be read by the clock driver in the following

order:

Byte 0 - Bits 7, 6, 5, 4, 3, 2, 1, 0

Byte 1 - Bits 7, 6, 5, 4, 3, 2, 1, 0

.

.

Byte N - Bits 7, 6, 5, 4, 3, 2, 1, 0

• Reserved and unused bits should be programmed to “0”.

SMBus Address for the CY28359 when SEL_ADDR=1:

A6

A5

A4

A3

A2

A1

A0

R/W

1101001

----

SMBus Address for the CY28359 when SEL_ADDR=0:

A6

A5

A4

A3

A2

A1

A0

R/W

1101110

----

Byte 22: Outputs Active/Inactive Register (1 = Active, 0 = Three-state), Default = Active

Bit

Pin #

Description

Default

Bit 7

--

Input Threshold Control00: Normal (1.25V)

01: 1.20V

10: 1.15V

11: 1.35V

0

Bit 6

--

0

Bit 5

9

FBOUTA

0 = Enable, 1 = Disable

0

Bit 4

1

FBOUTB

0 = Enable, 1 = Disable

0

Bit 3

Reserved, drive to 0

1

Bit 2

--

Reserved, drive to 0

1

Bit 1

24, 25

DDRBT2, DDRBC2

1

Bit 0

--

Reserved, drive to 0

1

Byte 23: Outputs Active/Inactive Register(1 = Active, 0 = Three-state), Default = Active

Bit

Pin #

Description

Default

Bit 7

5,6

DDRBT1, DDRBC1

1

Bit 6

3,4

DDRBT0, DDRBC0

1

Bit 5

21,20

DDRAT2, DDRAC2

1

Bit 4

--

Reserved, drive to 0

1

Bit 3

14,15

DDRAT1, DDRAC1

1

Bit 2

12,13

DDRAT0, DDRAC0

1

Bit 1

--

Reserved, drive to 0

1

Bit 0

--

Reserved, drive to 0

1