CY28411-1

Rev 1.0, November 22, 2006

Page 7 of 18

Crystal Recommendations

The CY28411-1 requires a Parallel Resonance Crystal.

Substituting a series resonance crystal will cause the

CY28411-1 to operate at the wrong frequency and violate the

ppm specification. For most applications there is a 300-ppm

frequency shift between series and parallel crystals due to

incorrect loading.

Crystal Loading

Crystal loading plays a critical role in achieving low ppm perfor-

mance. To realize low ppm performance, the total capacitance

the crystal will see must be considered to calculate the appro-

priate capacitive loading (CL).

The following diagram shows a typical crystal configuration

using the two trim capacitors. An important clarification for the

following discussion is that the trim capacitors are in series

with the crystal not parallel. It’s a common misconception that

load capacitors are in parallel with the crystal and should be

approximately equal to the load capacitance of the crystal.

This is not true.

Byte 6: Control Register 6

Bit

@Pup

Name

Description

7

0

REF/N or Hi-Z Select

0 = Hi-Z, 1 = REF/N Clock

6

0

Test Clock Mode Entry Control

0 = Normal operation, 1 = REF/N or Hi-Z mode,

5

0

Reserved

Reserved, Set = 0

4

1

REF

REF Output Drive Strength

0 = Low, 1 = High

3

1

PCIF, SRC, PCI

SW PCI_STP Function

0=SW PCI_STP assert, 1= SW PCI_STP deassert

When this bit is set to 0, all STOPPABLE PCI, PCIF and SRC outputs will

be stopped in a synchronous manner with no short pulses.

When this bit is set to 1, all STOPPED PCI, PCIF and SRC outputs will

resume in a synchronous manner with no short pulses.

2

Externally

selected

CPUT/C

FS_C Reflects the value of the FS_C pin sampled on power up

0 = FS_C was low during VTT_PWRGD# assertion

1

Externally

selected

CPUT/C

FS_B Reflects the value of the FS_B pin sampled on power up

0 = FS_B was low during VTT_PWRGD# assertion

0

Externally

selected

CPUT/C

FS_A Reflects the value of the FS_A pin sampled on power up

0 = FS_A was low during VTT_PWRGD# assertion

Byte 7: Vendor ID

Bit

@Pup

Name

Description

7

0

Revision Code Bit 3

Revision Code Bit 3

6

0

Revision Code Bit 2

Revision Code Bit 2

5

1

Revision Code Bit 1

Revision Code Bit 1

4

0

Revision Code Bit 0

Revision Code Bit 0

3

1

Vendor ID Bit 3

Vendor ID Bit 3

2

0

Vendor ID Bit 2

Vendor ID Bit 2

1

0

Vendor ID Bit 1

Vendor ID Bit 1

0

0

Vendor ID Bit 0

Vendor ID Bit 0

Table 5. Crystal Recommendations

Frequency

(Fund)

Cut

Loading

Load Cap

Drive

(max.)

Shunt Cap

(max.)

Motional

(max.)

Tolerance

(max.)

Stability

(max.)

Aging

(max.)

14.31818 MHz

AT

Parallel

20 pF

0.1 mW

5 pF

0.016 pF

35 ppm

30 ppm

5 ppm