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CY28419 Datasheet(PDF) 1 Page - SpectraLinear Inc |
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CY28419 Datasheet(HTML) 1 Page - SpectraLinear Inc |
1 / 15 page Clock Synthesizer with Differential SRC and CPU Outputs CY28419 Rev 1.0, November 22, 2006 Page 1 of 15 2200 Laurelwood Road, Santa Clara, CA 95054 Tel:(408) 855-0555 Fax:(408) 855-0550 www.SpectraLinear.com Features • CK409B-compliant • Supports Intel Pentium 4-type CPUs • Selectable CPU frequencies • 3.3V power supply • Ten copies of PCI clocks • Two copies 48 MHz clock • Five copies of 3V66 with one optional VCH • Four differential CPU clock pairs • One differential SRC clock •I2C support with readback capabilities • Ideal Lexmark Spread Spectrum profile for maximum electromagnetic interference (EMI) reduction • 56-pin SSOP package CPU SRC 3V66 PCI REF 48M x 4 x 1 x 5 x 10 x 2 x 2 Note: 1. Signals marked with [*] and [**] have internal pull-up and pull-down resistors, respectively. Block Diagram Pin Configuration REF_0 REF_1 XIN XOUT VSS_REF PCIF0 PCIF1 PCIF2 VDD_PCI VSS_PCI PCI0 PCI1 PCI2 PCI3 VDD_PCI VSS_PCI PCI4 PCI5 PCI6 PD# 3V66_0 3V66_1 VDD_3V66 VSS_3V66 FS_B VDD_A SDATA VDD_SRC SRCT SRCC VSS_SRC CPUT0 CPUC0 VDD_CPU CPUT1 CPUC1 VSS_CPU CPUT2 CPUC2 VDD_CPU CPUT3 FS_A VSS_IREF IREF VSS_A VTT_PWRGD# 3V66_2 3V66_3 SCLK VDD_48 VSS_48 USB_48 3V66_4/VCH 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 32 31 30 29 VDD_REF XTAL PLL Ref Freq XOUT XIN VDD_PCI OSC SCLK PLL 1 I2C Logic VDD_48MHz SDATA VDD_3V66 Divider Network VDD_CPU FS_(A:B) PD# REF0:1 VTT_PWRGD# IREF 3V66_(0:3) PCIF(0:2) PCI(0:6) DOT_48 3V66_4/VCH 2 PLL2 CPUT(0:3), CPUC(0:3) VDD_SRC SRCT, SRCC USB_48 VDD_REF DOT_48 CPUC3 [1] SSOP-56 |
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