6 shows the logic array of the PEEL16V8 configured
in Simple mode.
Simple mode also provides the option of configuring
an I/O pin as a dedicated input. In this case, the
output buffer is permanently disabled and the I/O
pin feedback is used to bring the input signal from
the pin into the logic array. This option is available
for all I/O pins except pins 15 and 16.
Complex Mode
In Complex mode, seven product terms feed the OR
array which can generate a purely combinatorial
function for the output pin. The programmable out-
put polarity selector provides active-high or active-
low logic, eliminating the need for external inverters.
The output buffer is controlled by the eighth product
term, allowing the macrocell to be configured for
input, output or bidirectional functions. Feedback
into the array for input or bidirectional functions is
available on all pins except 12 and 19. Figure 7
shows the logic array of the PEEL16V8 configured
in Complex mode.
Registered Mode
In Registered mode, eight product terms are pro-
vided to the OR array for registered functions. The
programmable output polarity selector provides ac-
tive-high or active-low logic, eliminating the need for
external inverters. (Note, however, that PEEL16V8
registers power-up reset and so before the first
clock arrives, the output at the pin will be low if the
user has selected active-high logic and high if the
user has selected active-low logic.) For registered
functions, the output buffer enable is controlled di-
rectly from the /OE control pin. Feedback into the
array comes from the macrocell register. In Regis-
tered mode, input pins 1 and 11 are permanently
allocated as CLK and /OE, respectively. Figure 8
shows the logic array of the PEEL16V8 configured
in Registered mode.
Registered mode also provides the option of config-
uring a macrocell for combinatorial operation, with
seven product terms feeding the OR function.
The programmable output polarity selector provides
active-high or active-low logic. The output buffer en-
able is controlled by the eighth product term, allow-
ing the macrocell to be configured for input, output
or bidirectional functions. Feedback into the array
for input or bidirectional functions is available on all
I/O pins.
Design Security
The PEEL16V8 provides a special EEPROM secu-
rity bit that prevents unauthorized reading or copy-
ing of designs programmed into the device. The
security bit is set by the PLD programmer, either at
the conclusion of the programming cycle or as a
separate step after the device has been pro-
grammed. Once the security bit has been set, it is
impossible to verify (read) or program the PEEL
until the entire device has first been erased with the
bulk-erase function.
Signature Word
The signature word feature allows a 64-bit code to
be programmed into the PEEL16V8. The code can-
not be read back after the security bit has been set.
The signature word can be used to identify the
pattern programmed into the device or to record the
design revision, etc.
PRODUCT T ERM
Complex Mode
Active L ow Output
1
PRODUCT T ERM
Complex Mode
Active High Output
2
Figure 4.
Macrocell Configurations for the Com-
plex Mode of the PEEL16V8
OE PIN
CLK PIN
DQ
Q
Registered Mode
Active High Registered Output
2
PRODUCT TERM
Registered Mode
Active Low Combinatorial Output
3
PRODUCT TERM
Registered Mode
Active High Combinatorial Output
4
OE PIN
CLK PIN
DQ
Q
Registered Mode
Active Low Registered Output
1
Figure 5. Macrocell Configurations for the Regis-
tered Mode of the PEEL16V8
PEEL™ 16V8
3- 10
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