X96011_08 datasheet(11/18 Pages) INTERSIL

Part #	X96011

Description	Temperature Sensor with Look-Up Table Memory and DAC

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Manufacturer	INTERSIL [Intersil Corporation]

Direct Link	http://www.intersil.com/cda/home

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11 / 18 page

11

FN8215.2

February 25, 2008

By examining the block diagram in Figure 5, we see that the

maximum current through pin IOUT is set by fixing values for

V(VRef) and R. The output current can then be varied by

changing the data byte at the D/A converter input.

In general, the magnitude of the current at the D/A converter

output pin may be calculated by Equation 1:

where N is the decimal representation of the input byte to the

corresponding D/A converter.

The value for the resistor determines the full scale output

current that the D/A converter may sink or source. Bits

IFSO1 and IFSO0 select the full scale output current setting

for Iout as described in “IFSO1 - IFSO0: Current Generator

Full Scale Output Set Bits (Non-volatile)” on page 9.

Bit IDS and in control register 0 select the direction of the

currents through pins Iout (See “IDS: Current Generator

Direction Select Bit (Non-volatile)” on page 7, and )“The IDS

bit sets the polarity of the Current Generator. When this bit is

set to “0” (default), the Current Generator of the X96011 is

configured as a Current Source. The Current Generator is

configured as a Current Sink when the IDS bit is set to “1”.

See Figure 5.”

D/A Converter Output Current Response

When the D/A converter input data byte changes by an

arbitrary number of bits, the output current changes from an

intial current level (Ix) to some final level (Ix + ΔIx). The

transition is monotonic and glitchless.

D/A Converter Control

The data byte inputs of the D/A converters can be controlled

in three ways:

1) With the A/D converter and through the look-up tables

(default)

2) Bypassing the A/D converter and directly accessing the

look-up tables

3) Bypassing both the A/D converter and look-up tables, and

directly setting the D/A converter input byte

The options are summarized in Table 1.

Bit DDAS is used to bypass the A/D converter and look-up

table, allowing direct access to the input of the D/A converter

with the byte in control register 3. See Figure 6, and the

descriptions of the control bits.

Bit IDS in Control Register 0 select the direction of the

current through pin Iout. See Figure 5, and the descriptions

of the control bits.

Power-on Reset

When power is applied to the VCC pin of the X96011, the device

undergoes a strict sequence of events before the current

outputs of the D/A converters are enabled.

When the voltage at VCC becomes larger than the power-on

reset threshold voltage (VPOR), the device recalls all control

bits from non-volatile memory into volatile registers. Next,

the analog circuits are powered up. When the voltage at VCC

becomes larger than a second voltage threshold (VADCOK),

the ADC is enabled. In the default case, after the ADC

performs four consecutive conversions with the same exact

result, the ADC output is used to select a byte from the

look-up table. The byte becomes the input of the DAC.

During all the previous sequence the input of the DAC is

00h. If bit ADCfiltOff is “1”, only one ADC conversion is

necessary. Bit DDAS and LDAS, also modify the way the

DAC is accessed the first time after power-up, as described

in “Control Register 5” on page 9.

The X96011 is a hot pluggable device. Voltage distrubances

on the VCC pin are handled by the power-on reset circuit,

allowing proper operation during hot plug-in applications.

Serial Interface

Serial Interface Conventions

The device supports a bidirectional bus oriented protocol.

The protocol defines any device that sends data onto the

bus as a transmitter, and the receiving device as the

receiver. The device controlling the transfer is called the

master and the device being controlled is called the slave.

The master always initiates data transfers, and provides the

clock for both transmit and receive operations. The X96011

operates as a slave in all applications.

Serial Clock and Data

Data states on the SDA line can change only while SCL is

LOW. SDA state changes while SCL is HIGH are reserved

for indicating START and STOP conditions. See Figure 10.

On power-up of the X96011, the SDA pin is in the input

mode.

Serial Start Condition

All commands are preceded by the START condition, which

is a HIGH to LOW transition of SDA while SCL is HIGH. The

device continuously monitors the SDA and SCL lines for the

START condition and does not respond to any command

until this condition has been met. See Figure 9.

TABLE 1. D/A CONVERTER ACCESS SUMMARY

LDAS

DDAS

CONTROL SOURCE

0

A/D converter through LUT

(Default)

1

0

Bits LDA5 - LDA0 through LUT

X

1

Bits DDA7 - DDA0

“X” = Don’t Care Condition (May be either “1” or “0”)

I = (V(VRef) / (384 * R)) *N

(EQ. 1)

X96011

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