CY7C138-25JI datasheet(8/16 Pages) CYPRESS

Part #	CY7C138-25JI

Description	4K x 8/9 Dual-Port Static RAM with Sem, Int, Busy

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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8 / 16 page

CY7C138

CY7C139

Document #: 38-06037 Rev. *B

Page 8 of 16

Write Cycle No. 2: R/W Three-States Data I/Os (Either Port)[22, 24, 25]

Semaphore Read After Write Timing, Either Side[26]

Notes:

25. Data I/O pins enter high impedance when OE is held LOW during write.

26. CE = HIGH for the duration of the above timing (both write and read cycle).

Switching Waveforms (continued)

tAW

tWC

tSCE

tSA

tPWE

tHD

tSD

tHZWE

tHA

HIGH IMPEDANCE

SEM OR CE

R/W

DATA OUT

DATA IN

tLZWE

DATA VALID

ADDRESS

tSOP

tAA

SEM

R/W

OE

I/O0

VALID ADDRESS

tHD

DATAIN VALID

DATAOUT VALID

tOHA

A0–A 2

tAW

tHA

tACE

tSOP

tSCE

tSD

tSA

tPWE

tSWRD

tDOE

WRITE CYCLE

READ CYCLE

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