DS1672

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Clock Accuracy

The accuracy of the clock is dependent upon the accuracy of the crystal and the accuracy of the match

between the capacitive load of the oscillator circuit and the capacitive load for which the crystal was

trimmed. Additional error will be added by crystal frequency drift caused by temperature shifts. External

circuit noise coupled into the oscillator circuit may result in the clock running fast. Refer to Application

Note 58: “Crystal Considerations with Dallas Real-Time Clocks” for detailed information.

Address Map

The counter is accessed by reading or writing the first 4 bytes of the DS1672 (00h–03h). The control

register and trickle charger are accessed by reading or writing the appropriate register bytes as illustrated

in Table 2. If the master continues to send or request more data after the address pointer has reached 05h,

the address pointer will wrap around to location 00h.

Table 2. Registers

ADDRESS

B7

B6

B5

B4

B3

B2

B1

B0

FUNCTION

00h

LSB

Counter Byte 1

01h

Counter Byte 2

02h

Counter Byte 3

03h

MSB

Counter Byte 4

04h

EOSC

Control

05h

TCS

TCS

TCS

TCS

DS

DS

RS

RS

Trickle Charger

Power Control

Table 3. Power Control

SUPPLY CONDITION

READ/WRITE

ACCESS

RST

POWERED BY

No

Active

No

Active

Yes

Inactive

Yes

Inactive

Oscillator Control

The

EOSC bit (bit 7 of the control register) controls the oscillator when in back-up mode. This bit when

set to logic 0 will start the oscillator. When this bit is set to a logic 1, the oscillator is stopped and the

is incremented only when

EOSC is a logic 0.