Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

DS1693 Datasheet(PDF) 10 Page - Dallas Semiconductor

Part # DS1693
Description  3V/5V Serialized Real-Time Clocks with NV RAM Control
Download  36 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  DALLAS [Dallas Semiconductor]
Direct Link  https://www.maximintegrated.com/en.html
Logo DALLAS - Dallas Semiconductor

DS1693 Datasheet(HTML) 10 Page - Dallas Semiconductor

Back Button DS1693 Datasheet HTML 6Page - Dallas Semiconductor DS1693 Datasheet HTML 7Page - Dallas Semiconductor DS1693 Datasheet HTML 8Page - Dallas Semiconductor DS1693 Datasheet HTML 9Page - Dallas Semiconductor DS1693 Datasheet HTML 10Page - Dallas Semiconductor DS1693 Datasheet HTML 11Page - Dallas Semiconductor DS1693 Datasheet HTML 12Page - Dallas Semiconductor DS1693 Datasheet HTML 13Page - Dallas Semiconductor DS1693 Datasheet HTML 14Page - Dallas Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 36 page
background image
DS1689/DS1693
10 of 36
The application software can select which interrupts, if any, are to be used. A total of 6 bits, including 3
bits in Register B and 3 bits in Extended Register B, enable the interrupts. The extended register locations
are described later. Writing logic 1 to an interrupt enable bit permits that interrupt to be initiated when the
event occurs. A logic 0 in the interrupt enable bit prohibits the
IRQ pin from being asserted from that
interrupt condition. If an interrupt flag is already set when an interrupt is enabled,
IRQ is immediately set
at an active level, even though the event initiating the interrupt condition may have occurred much earlier.
As a result, there are cases where the software should clear these earlier generated interrupts before first
enabling new interrupts.
When an interrupt event occurs, the relating flag bit is set to a logic 1 in Register C or in Extended
Register A. These flag bits are set regardless of the setting of the corresponding enable bit located either
in Register B or in Extended Register B. The flag bits can be used in a polling mode without enabling the
corresponding enable bits.
However, care should be taken when using the flag bits of Register C as they are automatically cleared to
0 immediately after they are read. Double latching is implemented on these bits so that bits that are set
remain stable throughout the read cycle. All bits which were set are cleared when read and new interrupts
which are pending during the read cycle are held until after the cycle is completed. One, 2, or 3 bits can
be set when reading Register C. Each utilized flag bit should be examined when read to ensure that no
interrupts are lost.
The flag bits in Extended Register A are not automatically cleared following a read. Instead, each flag bit
can be cleared to 0 only by writing 0 to that bit.
When using the flag bits with fully enabled interrupts, the
IRQ line is driven low when an interrupt flag
bit is set and its corresponding enable bit is also set.
IRQ is held low as long as at least one of the six
possible interrupt sources has it s flag and enable bits both set. The IRQF bit in Register C is 1 whenever
the
IRQ pin is being driven low as a result of one of the six possible active sources. Therefore,
determination that the DS1689/DS1693 initiated an interrupt is accomplished by reading Register C and
finding IRQF = 1. IRQF remains set until all enabled interrupt flag bits are cleared to 0.
SQUARE-WAVE OUTPUT SELECTION
The SQW pin can be programmed to output a variety of frequencies divided down from the 32.768kHz
crystal tied to X1 and X2. The square-wave output is enabled and disabled via the SQWE bit in Register
B. If the square wave is enabled (SQWE = 1), the output frequency is determined by the settings of the
E32K bit in Extended Register B and by the RS3–RS0 bits in Register A. If the E32K = 1, then a
32.768kHz square wave is output on the SQW pin regardless of the settings of RS3–RS0.
If E32K = 0, then the square-wave output frequency is determined by the RS3–RS0 bits. These bits
control a 1-of-15 decoder, which selects one of 13 taps that divide the 32.768kHz frequency. The RS3–
RS0 bits establish the SQW output frequency as shown in Table 2. In addition, RS3–RS0 bits control the
periodic interrupt selection as described below.
If SQWE1, E32K = 1, and the auxiliary battery enable bit (ABE, bank 1; register 04BH) is enabled, and
voltage is applied to VBAUX, then the 32kHz square-wave output signal is output on the SQW pin in the
absence of VCC. This facility is provided to clock external power management circuitry. If any of the
above requirements are not met, no square-wave output signal is generated on the SQW pin in the
absence of VCC.


Similar Part No. - DS1693

ManufacturerPart #DatasheetDescription
logo
Dallas Semiconductor
DS1693 DALLAS-DS1693 Datasheet
321Kb / 32P
   3-Volt/5-Volt Serialized Real-Time Clock with NV RAM Control
logo
Maxim Integrated Produc...
DS1693 MAXIM-DS1693 Datasheet
599Kb / 36P
   3V/5V Serialized Real-Time Clocks with NV RAM Control
REV: 112105
More results

Similar Description - DS1693

ManufacturerPart #DatasheetDescription
logo
Dallas Semiconductor
DS1688 DALLAS-DS1688_05 Datasheet
395Kb / 6P
   3V/5V Serialized Real-Time Clocks with NV RAM Control
logo
Maxim Integrated Produc...
DS1688 MAXIM-DS1688 Datasheet
99Kb / 3P
   3V/5V Serialized Real-Time Clocks with NV RAM Control
REV: 112205
DS1689 MAXIM-DS1689 Datasheet
599Kb / 36P
   3V/5V Serialized Real-Time Clocks with NV RAM Control
REV: 112105
DS1685 MAXIM-DS1685 Datasheet
420Kb / 33P
   3V/5V Real-Time Clocks
REV: 032604
DS1685 MAXIM-DS1685_12 Datasheet
654Kb / 34P
   3V/5V Real-Time Clocks
Rev 10/12
DS1685 MAXIM-DS1685_10 Datasheet
350Kb / 34P
   3V/5V Real-Time Clocks
Rev 4/10
logo
Dallas Semiconductor
DS1685 DALLAS-DS1685_05 Datasheet
766Kb / 39P
   3V/5V Real-Time Clocks
DS1688 DALLAS-DS1688 Datasheet
46Kb / 5P
   3 Volt/5 Volt Serialized Real Time Clock with NV RAM Control
DS1689 DALLAS-DS1689 Datasheet
321Kb / 32P
   3-Volt/5-Volt Serialized Real-Time Clock with NV RAM Control
DS14285 DALLAS-DS14285 Datasheet
303Kb / 25P
   Real Time Clock with NV RAM Control
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com