4 / 10 page
PRELIMINARY
CY7C1399D
Document #: 38-05467 Rev. *C
Page 4 of 10
Capacitance[5]
Parameter
Description
Test Conditions
Max.
Unit
CIN: Addresses
Input Capacitance
TA = 25°C, f = 1 MHz, VCC = 3.3V
5
pF
CIN: Controls
6pF
COUT
Output Capacitance
6
pF
Thermal Resistance[5]
Parameter
Description
Test Conditions
All – Packages
Unit
Θ
JA
Thermal Resistance
(Junction to Ambient)[5]
Still Air, soldered on a 3 × 4.5 inch, two-layer
printed circuit board
TBD
°C/W
Θ
JC
Thermal Resistance
(Junction to Case)[5]
TBD
°C/W
AC Test Loads and Waveforms
Switching Characteristics Over the Operating Range [7]
Parameter
Description
1399D-10
1399D-12
1399D-15
Min.
Max.
Min.
Max.
Min.
Max.
Unit
Read Cycle
tpower
[6]
VCC(typical) to the first access
100
100
100
µs
tRC
Read Cycle Time
10
12
15
ns
tAA
Address to Data Valid
10
12
15
ns
tOHA
Data Hold from Address Change
3
3
3
ns
tACE
CE LOW to Data Valid
10
12
15
ns
tDOE
OE LOW to Data Valid
5
5
6
ns
tLZOE
OE LOW to Low Z[8]
00
0
ns
tHZOE
OE HIGH to High Z[8, 9]
55
6
ns
tLZCE
CE LOW to Low Z[8]
33
3
ns
Notes:
6. tPOWER gives the minimum amount of time that the power supply should be at typical VCC values until the first memory access can be performed.
7. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
IOL/IOH and capacitance CL = 30 pF.
3.0V
3.3V
OUTPUT
R1 317
Ω
R2
351
Ω
30pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
≤ 3ns
≤ 3 ns
OUTPUT
1.73V
Equivalent to:
THÉVENIN EQUIVALENT
ALL INPUT PULSES
167
Ω
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
30 pF*
OUTPUT
Z = 50
Ω
50
Ω
1.5V
(a)
10-ns Device
12-ns Device
3.3V
OUTPUT
5 pF
INCLUDING
JIG AND
SCOPE
(c)
R1 317
Ω
R2
351
Ω
High-Z characteristics:
(b)
(d)