2 / 21 page
CY7C68300A
This part is not recommended for new designs
Use CY7C68300B EZ-USB AT2LP™ USB2.0 to ATA/ATAPI
Bridge for new designs
Document #: 38-08031 Rev. *E
Page 2 of 21
and receives status and data from the CY7C68300A using
standard USB protocol.
The ATA/ATAPI port of the CY7C68300A is connected to a
mass storage device. A 4-Kbyte buffer maximizes ATA/ATAPI
data transfer rates by minimizing losses due to device seek
times. The ATA interface supports ATA PIO modes 0, 3, and 4,
and Ultra DMA modes 2 and 4.
The device initialization process is configurable, enabling the
CY7C68300A to initialize ATA/ATAPI devices without software
intervention.
3.0
Pin Assignments
3.1
Pin Diagram
Figure 3-1. 56-pin SSOP
24
23
20
21
22
19
18
17
14
15
16
13
12
11
8
9
10
7
6
5
2
3
4
1
26
28
25
27
33
34
37
36
35
38
39
40
43
42
41
44
45
46
49
48
47
50
51
52
55
54
53
56
31
29
32
30
DD3
DD2
DD1
DD0
Vcc
SDA
SCL
RESERVED
PU10K
GND
Vcc
GND
DD4
DD5
DD6
DD7
GND
Vcc
GND
DIOW#
DIOR#
DMACK#
Vcc
INTRQ
DMINUS
DPLUS
Vcc
AGND
DA0
DA1
DA2
CS0#
XTALIN
XTALOUT
AVcc
DMARQ
CS1#
VBUS_PWR_VALID
ARESET#
GND
IORDY
GND
Vcc
NC
RESET#
Vcc
ATA_EN
DD8
GND
DD15
DD14
DD13
DD9
DD10
DD11
DD12
EZ-USB AT2
CY7C68300A
56-pin SSOP
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
