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CY8C20534, CY8C20434
CY8C20334, CY8C20234
Document Number: 001-05356 Rev. *D
Page 10 of 34
32-Pin Part Pinout
Figure 7. CY8C20434 32-Pin PSoC Device
A I, P 0 [1 ]
AI, P2 [7 ]
AI, P2 [5 ]
AI, P2 [3 ]
AI, P2 [1 ]
AI, P3 [3 ]
QF N
(Top V ie w )
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
AI, P3 [1 ]
SPI SS , P1 [7 ]
P 0 [0 ], A I
P 2 [6 ], A I
P 3 [0 ], A I
XR ES
P 2 [4 ], A I
P 2 [2 ], A I
P 2 [0 ], A I
P 3 [2 ], A I
AI, I2 C SC L
Table 4. 32-Pin Part Pinout (QFN [2])
Pin No.
Type
Name
Description
Digital
Analog
1
IO
I
P0[1]
2
IO
I
P2[7]
3
IO
I
P2[5]
4
IO
I
P2[3]
5
IO
I
P2[1]
6
IO
I
P3[3]
7
IO
I
P3[1]
8
IOH
I
P1[7]
I2C SCL, SPI SS.
9
IOH
I
P1[5]
I2C SDA, SPI MISO.
10
IOH
I
P1[3]
SPI CLK.
11
IOH
I
P1[1]
CLK[1], I2C SCL, SPI MOSI.
12
Power
Vss
Ground connection.
13
IOH
I
P1[0]
DATA[1], I2C SDA.
14
IOH
I
P1[2]
15
IOH
I
P1[4]
Optional external clock input (EXTCLK).
16
IOH
I
P1[6]
17
Input
XRES
Active high external reset with internal pull down.
18
IO
I
P3[0]
19
IO
I
P3[2]
20
IO
I
P2[0]
21
IO
I
P2[2]
22
IO
I
P2[4]
23
IO
I
P2[6]
24
IO
I
P0[0]
25
IO
I
P0[2]
26
IO
I
P0[4]
27
IO
I
P0[6]
Analog bypass.
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