CY8C42323/CY8C42423
PRELIMINARY
CY8C42123/CY8C42223
Document 38-12034 Rev. *C
Page 6 of 42
5.2
Buck Converter Battery Charger with Current Limit
A battery charger is constant current and constant voltage power supply. At different points in a charging cycle a Lithium Ion
battery requires a constant current or a constant voltage to be applied. The CY8C42x23 Power PSoC can be configured as a
constant voltage or constant current linear supply. In this configuration, the HVdd voltage is high enough to drive one or more
battery in series and a lower voltage must be generated efficiently. Lithium Ion batteries have a fully charged voltage of 4.2V. With
the two-cell configuration in Figure 5-2, HVdd would have to be at least 8.4V (plus allowance for voltage losses in the FET and
the current sense resistor, RISENSE). The HVdd voltage is converted to 5V by the internal Low Drop-Out Regulator for use by the
Power PSoC Core.
Figure 5-2
shows an inductor, two FETs, and a capacitor configured as a buck converter with the CY8C42x23 as the controller.
The voltage on the capacitor is fed back through a voltage sense pin, VS1, and an attenuator, Atten1, to the comparator, COMP1.
The output of the comparator controls a single PSoC digital block configured as a pulse width modulator (PWM). The reference
for the comparator is the output of VDAC1. When the attenuator output exceeds the reference, the comparator will stop the PWM
using the "Kill" input. This creates a feedback loop that maintains the VS1 node at a voltage proportional to the VDAC1 setting.
The Atten1 output is also connected to the ADC so the control software can monitor the output voltage. The accuracy of the ADC
and the control loop are better than 0.75%. Meeting high accuracy is critical to Lithium Ion batteries.
To maintain constant current, the voltage across the RISENSE resistor is routed through pin P1[0] and AMuxBus0 to the ADC
where it is monitored. The control software adjusts the VDAC1 setting, based on current sense measurements, to achieve the
desired current through the load. The current sense voltage is also connected to the positive input of COMP0. The negative input
of COMP0 is controlled by the output of ODAC0. If the current sense voltage exceeds the ODAC0 setting, the output of the
comparator will be latched high. This acts as an over-current detection circuit that can be cleared by the control software. The
output of the comparator, COMP0, can be combined with the output of COMP1 and connected to the Kill input of the PWM. This
configures the Power PSoC so that an over-current condition will shut off the External PFET.
For a lower cost, but lower efficiency, converter, Q2 can be replaced with a diode.
5.2.1
Resources
This application could connect the RISENSE resistor to any of the GPIO pins (P0[7:0] and P1[1:0]). The Power PSoC still has three
digital blocks, half of the high voltage resources, one VDAC, two IDACs, seven of the analog multiplexer channels to the ADC,
and over 90% of the CPU available to implement the battery charging algorithm and other tasks.
Figure 5-2. Buck Converter Battery Charger with Current Limit
GDO1
HVO[1]
Atten0
Atten1
AMuxBus0
AMuxBus1
AMuxBus2
AMuxBus3
P0[6]
P0[4]
P0[2]
P0[0]
P1[0]
P0[7]
P0[5]
P0[3]
P0[1]
P1[1]
ODAC0
ODAC1
VDAC0
ODAC0
VBG
IBIAS
VDAC0
VDAC1
ODAC1
VDAC1
VS1
GDO0
VS0
HVO[0]
HVDriver
DBC01
DBC00
IDAC0
COMP1
COMP0
HVDriver
Analogto
Digital
Convertor
IDAC1
HVdd
R
ISENSE
HVdd
InternalVdd
ANALOG and HIGH VOLTAGE
SECTIONS
LowDrop-Out
Regulator
HVdd
PWM DB
DCB00
DCB01
Kill
PWM
primary
DIGITAL SECTION
DBD02
DCD03
PWM
secondary
Q1
Q2
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