CY8C25122/CY8C26233/CY8C26443/CY8C26643 Device Family Data Sheet
8
Document #: 38-12010 CY Rev. *C
May 17, 2005
Table 46: Interrupt Vector Register ............................................................................................................46
Table 47: Digital Basic Type A/ Communications Type A Block xx Function Register...............................50
Table 48: Digital Basic Type A / Communications Type A Block xx Input Register ................................... 51
Table 49: Digital Function Data Input Definitions ....................................................................................... 52
Table 50: Digital Basic Type A / Communications Type A Block xx Output Register................................. 53
Table 51: Digital Function Outputs ............................................................................................................. 54
Table 52: Digital Basic Type A / Communications Type A Block xx Data Register 0,1,2 ........................... 54
Table 53: R/W Variations per User Module Selection ................................................................................ 55
Table 54: Digital Basic Type A / Communications Type A Block xx Control Register 0 ............................. 55
Table 55: Digital Basic Type A/Communications Type A Block xx Control Register 0... ............................ 56
Table 56: Digital Communications Type A Block xx Control Register 0... ..................................................57
Table 57: Digital Communications Type A Block xx Control Register 0... ..................................................58
Table 58: Digital Communications Type A Block xx Control Register 0... ..................................................59
Table 59: Global Input Assignments........................................................................................................... 60
Table 60: Global Output Assignments........................................................................................................ 60
Table 61: Analog System Clocking Signals................................................................................................ 72
Table 62: AGND, RefHI, RefLO Operating Parameters ............................................................................. 74
Table 63: Analog Reference Control Register............................................................................................ 75
Table 64: Analog Column Clock Select Register........................................................................................ 76
Table 65: Analog Clock Select Register ..................................................................................................... 77
Table 66: Analog Continuous Time Block xx Control 0 Register................................................................ 82
Table 67: Analog Continuous Time Block xx Control 1 Register................................................................ 83
Table 68: Analog Continuous Time Type A Block xx Control 2 Register ................................................... 84
Table 69: Analog Switch Cap Type A Block xx Control 0 Register ............................................................ 88
Table 70: Analog Switch Cap Type A Block xx Control 1 Register ............................................................ 90
Table 71: Analog Switch Cap Type A Block xx Control 2 Register ............................................................ 92
Table 72: Analog Switch Cap Type A Block xx Control 3 Register ............................................................ 93
Table 73: Analog Switch Cap Type B Block xx Control 0 Register ............................................................ 95
Table 74: Analog Switch Cap Type B Block xx Control 1 Register ............................................................ 97
Table 75: Analog Switch Cap Type B Block xx Control 2 Register ............................................................ 99
Table 76: Analog Switch Cap Type B Block xx Control 3 Register .......................................................... 100
Table 77: Analog Comparator Control Register .......................................................................................101
Table 78: Analog Frequency Relationships.............................................................................................. 102
Table 79: Analog Synchronization Control Register................................................................................. 102
Table 80: Analog Input Select Register ....................................................................................................104
Table 81: Analog Output Buffer Control Register ..................................................................................... 106
Table 82: Analog Modulator Control Register .......................................................................................... 107
Table 83: Multiply Input X Register........................................................................................................... 110
Table 84: Multiply Input Y Register........................................................................................................... 110
Table 85: Multiply Result High Register ................................................................................................... 111
Table 86: Multiply Result Low Register ....................................................................................................111
Table 87: Accumulator Result 1 / Multiply/Accumulator Input X Register ................................................111
Table 88: Accumulator Result 0 / Multiply/Accumulator Input Y Register ................................................111
Table 89: Accumulator Result 3 / Multiply/Accumulator Clear 0 Register ................................................112
Table 90: Accumulator Result 2 / Multiply/Accumulator Clear 1 Register ................................................112
Table 91: Decimator/Incremental Control Register .................................................................................. 113
Table 92: Decimator Data High Register.................................................................................................. 113
Table 93: Decimator Data Low Register................................................................................................... 113
Table 94: Processor Status and Control Register .................................................................................... 114
Table 95: Reset WDT Register.................................................................................................................116
Table 96: Voltage Monitor Control Register .............................................................................................118
Table 97: Bandgap Trim Register............................................................................................................. 120
Table 98: CY8C25122, CY8C26233, CY8C26443, CY8C26643 (256 Bytes of SRAM) .......................... 121
Table 99: Table Read for Supervisory Call Functions .............................................................................. 122
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