CY22701FSXCT datasheet(10/15 Pages) CYPRESS

Part #	CY22701FSXCT

Description	1 PLL In-System Programmable Clock Generator

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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10 / 15 page

PRELIMINARY

CY22701

Document #: 38-07698 Rev. *B

Page 10 of 15

Serial Programming Interface Timing

Figure 6. Start and Stop Frame

Figure 7. Frame Format (Device Address, R/W, Register Address, Register Data)

SDAT

SCLK

START

Transition

to next Bit

STOP

SDAT

SCLK

DA6

DA5 DA0

R/W

ACK

RA7

RA6 RA1

RA0

ACK

STOP

START

ACK

D7

D6

D1

D0

++

+

Table 14.Recommended Pullable Crystal Specifications

Parameter

Description

Comments

Min.

Typ.

Max.

Units

CLNOM

Nominal load capacitance

–

14

–

pF

R1

Equivalent series resistance (ESR)

Fundamental mode

–

25

Ω

R3/R1

Ratio of third overtone mode ESR to

fundamental mode ESR

Ratio used because typical R1 values

are much less than the maximum spec

3–

–

DL

Crystal drive level

No external series resistor assumed

–

0.5

2

mW

F3SEPHI

Third overtone separation from 3*FNOM High side

400

–

ppm

F3SEPLO

Third overtone separation from 3*FNOM Low side

–

–200

ppm

C0

Crystal shunt capacitance

–

7

pF

C0/C1

Ratio of shunt to motional capacitance

180

–

250

C1

Crystal motional capacitance

14.4

18

21.6

fF

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