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CY28510OCT Datasheet(PDF) 4 Page - Cypress Semiconductor

Part # CY28510OCT
Description  Peripheral I/O Clock Generator
Download  13 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY28510OCT Datasheet(HTML) 4 Page - Cypress Semiconductor

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CY28510
Document #: 38-07542 Rev. **
Page 4 of 13
....
Data bytes from master/Acknowledge
39:46
Data byte 0 from slave – 8 bits
....
Data Byte N – 8 bits
47
Acknowledge
....
Acknowledge from slave
48:55
Data byte 1 from slave – 8 bits
....
Stop
56
Acknowledge
....
Data bytes from slave/acknowledge
....
Data byte N from slave – 8 bits
....
Not acknowledge
....
Stop
Table 2. Block Read and Block Write Protocol (continued)
Block Write Protocol
Block Read Protocol
Bit
Description
Bit
Description
Table 3. Byte Read and Byte Write Protocol
Byte Write Protocol
Byte Read Protocol
Bit
Description
Bit
Description
1
Start
1
Start
2:8
Slave address – 7 bits
2:8
Slave address – 7 bits
9
Write = 0
9
Write = 0
10
Acknowledge from slave
10
Acknowledge from slave
11:18
Command Code – 8 bits
'1xxxxxxx' stands for byte operation, bits[6:0] of
the command code represents the offset of the
byte to be accessed
11:18
Command Code – 8 bits
'1xxxxxxx' stands for byte operation, bits[6:0]
of the command code represents the offset
of the byte to be accessed
19
Acknowledge from slave
19
Acknowledge from slave
20:27
Data byte from master – 8 bits
20
Repeat start
28
Acknowledge from slave
21:27
Slave address – 7 bits
29
Stop
28
Read = 1
29
Acknowledge from slave
30:37
Data byte from slave – 8 bits
38
Not acknowledge
39
Stop
Serial Control Registers
Byte 0: Clock Enable Register 1
Bit
@Pup
Name
Description
7
1
CLKG0_0
1 = enabled, 0 = tri-state
6
1
CLKG0_1
1 = enabled, 0 = tri-state
5
1
CLKG0_2
1 = enabled, 0 = tri-state
4
1
CLKG0_3
1 = enabled, 0 = tri-state
3
1
CLKG0_4
1 = enabled, 0 = tri-state
2
1
CLKG0_5
1 = enabled, 0 = tri-state
1
1
CLKG0_6
1 = enabled, 0 = tri-state
0
1
CLKG0_7
1 = enabled, 0 = tri-state


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