CY28551
Document #: 001-05675 Rev. *C
Page 3 of 30
45
VTT_PWRGD#/PD
I
3.3V LVTTL input. This pin is a level-sensitive strobe used to latch the HW strapping
pin inputs. After asserting VTT_PWRGD# (active LOW), this pin becomes a
real-time input for asserting power-down (active HIGH).
46
SDATA
I/O
SMBus compatible SDATA
47
SCLK
I
SMBus compatible SCLOCK.
48
VDDREF
PWR
3.3V Power supply for outputs
49
XOUT
O
14.318 MHz Crystal Output
50
XIN
I
14.318 MHz Crystal Input
51
VSSREF
GND
Ground for outputs
52
REF2
O, SE 14.318 MHz REF clock output.
Intel Type-5 output buffer
53
**FSC/REF1
I/O,PD,
SE
3.3V tolerant input for CPU frequency selection/14.318 MHz REF clock output
Internal 150k pull down
Intel Type-5 output buffer
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications
54
**FSD/REF0
I/O,PD,
SE
3.3V tolerant input for CPU frequency selection/14.318 MHz REF clock output
Internal 150k pull down
Intel Type-5 output buffer
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications
55
RESET_I#/SRESE
T#
I/O, OD 3.3V tolerant input for reset all of registers to default setting
3.3V LVTTL output for watchdog reset signal
56
**DOC1
I, PD
Dynamic Over Clocking pin
0 = normal; 1 = Frequency will be changed depend on DOC register. Internal 150k
pull-down
57
PCI0/**CLKREQ#B I/O,SE,
PD
33 MHz clock output/Output enable control for PCIEX4; 5 via I2C register
Default is PCI0
0 = Selected PCIEXs are enabled, 1 = Selected PCIEXs are disabled. Internal 150k
pull down
Intel Type-3A output buffer
58
PCI1/**CLKREQ#A I/O,SE,
PD
33 MHz clock output/Output enable control for PCIEX6, 7via I2C register. Default is
PCI1
0 = Selected PCIEXs are enabled, 1 = Selected PCIEXs are disabled. Internal 150k
pull down
Intel Type-3A output buffer
59
VSSPCI
GND
Ground for outputs.
60
**FSA/PCI2
I/O, PD 3.3V tolerant input for CPU frequency selection/33 MHz clock output. Internal 150k
pull down
Intel Type-3A output buffer
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications
61
*FSB/PCI3
I/O, PU 3.3V tolerant input for CPU frequency selection/33 MHz clock output. Internal 150k
pull up
Intel Type-3A output buffer
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications
62
VDDPCI
PWR
3.3V power supply for outputs.
63
*SELP4_K8/PCI3
I/O, PU 3.3V tolerant input for CPU clock output buffer type selection/33 MHz clock output.
Internal 150k pull up
Intel Type-3A output buffer
Refer to DC Electrical Specifications table for Vil_FS and Vih_FS specifications
0 = K8 CPU buffer type, 1 = P4 CPU buffer type.
64
*SEL0/PCI5
I/O, PU 3.3V tolerant input for output selection/33 MHz clock output. Refer to Table 1 for
selection options.
Internal 150k pull up
Pin Description (continued)
Pin No.
Name
Type
Description
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