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W40S11-23
3
Writing Data Bytes
Each bit in the data bytes control a particular device function.
Bits are written MSB (most significant bit) first, which is bit 7.
Table 2 gives the bit formats for registers located in Data
Bytes 0–6.
Note:
2.
At power-up all SDRAM outputs are enabled and active. Program Reserved bits to a “0.”
Table 2. Data Bytes 0–2 Serial Configuration Map[2]
Bit(s)
Affected Pin
Control Function
Bit Control
Pin No.
Pin Name
0
1
Data Byte 0 SDRAM Active/Inactive Register (1 = Enable, 0 = Disable)
7
11
SDRAM5
Clock Output Disable
Low
Active
6
10
SDRAM4
Clock Output Disable
Low
Active
5
N/A
Reserved
(Reserved)
-
-
4
N/A
Reserved
(Reserved)
-
-
3
7
SDRAM3
Clock Output Disable
Low
Active
2
6
SDRAM2
Clock Output Disable
Low
Active
1
3
SDRAM1
Clock Output Disable
Low
Active
0
2
SDRAM0
Clock Output Disable
Low
Active
Data Byte 1 SDRAM Active/Inactive Register (1 = Enable, 0 = Disable)
7
27
SDRAM11
Clock Output Disable
Low
Active
6
26
SDRAM10
Clock Output Disable
Low
Active
5
23
SDRAM9
Clock Output Disable
Low
Active
4
22
SDRAM8
Clock Output Disable
Low
Active
3
N/A
Reserved
(Reserved)
-
-
2
N/A
Reserved
(Reserved)
-
-
1
19
SDRAM7
Clock Output Disable
Low
Active
0
18
SDRAM6
Clock Output Disable
Low
Active
Data Byte 2 SDRAM Active/Inactive Register (1 = Enable, 0 = Disable)
7
N/A
Reserved
(Reserved)
-
-
6
12
SDRAM12
Clock Output Disable
Low
Active
5
N/A
Reserved
(Reserved)
--
--
4
N/A
Reserved
(Reserved)
--
--
3
N/A
Reserved
(Reserved)
--
--
2
N/A
Reserved
(Reserved)
--
--
1
N/A
Reserved
(Reserved)
--
--
0
N/A
Reserved
(Reserved)
--
--
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