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M25P32-VMW6TG Datasheet(PDF) 7 Page - Numonyx B.V |
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M25P32-VMW6TG Datasheet(HTML) 7 Page - Numonyx B.V |
7 / 53 page M25P32 Description 7/53 Figure 1. Logic diagram Figure 2. VDFPN connections 1. There is an exposed central pad on the underside of the MLP8 package. This is pulled, internally, to VSS, and must not be allowed to be connected to any other voltage or signal line on the PCB. 2. See Package mechanical section for package dimensions, and how to identify pin-1. Table 1. Signal names Signal name Function Direction C Serial Clock Input D Serial Data input Input Q Serial Data output Output S Chip Select Input W/VPP Write Protect/Enhanced Program supply voltage Input HOLD Hold Input VCC Supply voltage Input VSS Ground AI07483b S VCC M25P32 HOLD VSS W/VPP Q C D 1 AI08518b 2 3 4 8 7 6 5 D VSS C HOLD Q SVCC M25P32 W/VPP |
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