CY54FCT573T, CY74FCT573T

8-BIT LATCHES

WITH 3-STATE OUTPUTS

SCCS068 – OCTOBER 2001

7

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

3 V

3 V

0 V

0 V

th

tsu

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Data Input

tPLH

tPHL

tPHL

tPLH

VOH

VOH

VOL

VOL

3 V

0 V

Input

Out-of-Phase

Output

In-Phase

Output

Timing Input

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

Output

Control

Output

Waveform 1

(see Note B)

Output

Waveform 2

(see Note B)

VOL

VOH

tPZL

tPZH

tPLZ

tPHZ

≈3.5 V

0 V

VOL + 0.3 V

≈0 V

3 V

VOLTAGE WAVEFORMS

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

tPLH/tPHL

tPLZ/tPZL

tPHZ/tPZH

Open

7 V

Open

TEST

S1

3 V

0 V

tw

VOLTAGE WAVEFORMS

PULSE DURATION

Input

NOTES: A. CL includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. The outputs are measured one at a time with one input transition per measurement.

From Output

Under Test

CL = 50 pF

(see Note A)

LOAD CIRCUIT FOR

3-STATE OUTPUTS

S1

7 V

500

Ω

GND

From Output

Under Test

CL = 50 pF

(see Note A)

Test

Point

LOAD CIRCUIT FOR

TOTEM-POLE OUTPUTS

Open

VOH – 0.3 V

500

Ω

500

Ω

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

1.5 V

Figure 1. Load Circuit and Voltage Waveforms