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M14C16-WS23 Datasheet(PDF) 8 Page - STMicroelectronics |
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M14C16-WS23 Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 13 page  M14C16, M14C04 8/13 After the last memory address, the address counter will ‘roll-over’ and the memory will contin- ue to output data from the start of the memory block. Acknowledge in Read Mode In all read modes the memory waits for an ac- knowledgment during the 9th bit time. If the master does not pull the SDA line low during this time, the memory terminates the data transfer and switches to its standby state. Figure 8. Read Mode Sequences Note: 1. The seven most significant bits of the Device Select bytes of a Random Read (in the 1st and 3rd bytes) must be identical. DEV SEL * BYTE ADDR DEV SEL DATA OUT 1 AI01942 DATA OUT N CURRENT ADDRESS READ DEV SEL DATA OUT RANDOM ADDRESS READ DEV SEL * DATA OUT SEQUENTIAL CURRENT READ DATA OUT N DEV SEL * BYTE ADDR SEQUENTIAL RANDOM READ DEV SEL * DATA OUT 1 ACK R/W NO ACK ACK R/W ACK ACK R/W ACK ACK ACK NO ACK R/W NO ACK ACK ACK R/W ACK ACK R/W ACK NO ACK |
Similar Part No. - M14C16-WS23 |
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