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M24512MJ Datasheet(PDF) 8 Page - STMicroelectronics |
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M24512MJ Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 24 page  M24512 8/24 Figure 6. Write Mode Sequences with WC=1 (data write inhibited) Write Operations Following a Start condition the bus master sends a Device Select Code with the Read/Write bit (RW) reset to 0. The device acknowledges this, as shown in Figure 7., and waits for two address bytes. The device responds to each address byte with an acknowledge bit, and then waits for the data byte. Writing to the memory may be inhibited if Write Control (WC) is driven High. Any Write instruction with Write Control (WC) driven High (during a pe- riod of time from the Start condition until the end of the two address bytes) will not modify the memory contents, and the accompanying data bytes are not acknowledged, as shown in Figure 6.. Each data byte in the memory has a 16-bit (two byte wide) address. The Most Significant Byte (Ta- ble 4.) is sent first, followed by the Least Signifi- cant Byte (Table 5.). Bits b15 to b0 form the address of the byte in memory. When the bus master generates a Stop condition immediately after the Ack bit (in the “10th bit” time slot), either at the end of a Byte Write or a Page Write, the internal Write cycle is triggered. A Stop condition at any other time slot does not trigger the internal Write cycle. After the Stop condition, the delay tW, and the suc- cessful completion of a Write operation, the de- vice’s internal address counter is incremented automatically, to point to the next byte address af- ter the last one that was modified. During the internal Write cycle, Serial Data (SDA) is disabled internally, and the device does not re- spond to any requests. Byte Write After the Device Select code and the address bytes, the bus master sends one data byte. If the addressed location is Write-protected, by Write Control (WC) being driven High, the device replies with NoAck, and the location is not modified. If, in- stead, the addressed location is not Write-protect- BYTE WRITE DEV SEL BYTE ADDR BYTE ADDR DATA IN WC PAGE WRITE DEV SEL BYTE ADDR BYTE ADDR DATA IN 1 WC DATA IN 2 AI01120C PAGE WRITE (cont'd) WC (cont'd) DATA IN N ACK ACK ACK NO ACK R/W ACK ACK ACK NO ACK R/W NO ACK NO ACK |
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