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NAND01GW4B2CZA1E Datasheet(PDF) 3 Page - Numonyx B.V

Part # NAND01GW4B2CZA1E
Description  1-Gbit, 2-Gbit, 2112-byte/1056-word page, 1.8 V/3 V, NAND flash memory
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Manufacturer  NUMONYX [Numonyx B.V]
Direct Link  http://www.numonyx.com
Logo NUMONYX - Numonyx B.V

NAND01GW4B2CZA1E Datasheet(HTML) 3 Page - Numonyx B.V

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NAND01G-B2B, NAND02G-B2C
Contents
3/60
6.2
Cache read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.3
Page program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.3.1
Sequential input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.3.2
Random data input in a page . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
6.4
Copy back program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6.5
Cache program . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.6
Block erase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.7
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6.8
Read status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.8.1
Write protection bit (SR7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.8.2
P/E/R controller and cache ready/busy bit (SR6) . . . . . . . . . . . . . . . . . 30
6.8.3
P/E/R controller bit (SR5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.8.4
Cache program error bit (SR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.8.5
Error bit (SR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.8.6
SR4, SR3 and SR2 are reserved . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.9
Read electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7
Data protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
8
Software algorithms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.1
Bad block management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.2
NAND flash memory failure modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
8.3
Garbage collection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.4
Wear-leveling algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.5
Error correction code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
8.6
Hardware simulation models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.6.1
Behavioral simulation models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
8.6.2
IBIS simulations models . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
9
Program and erase times and endurance cycles . . . . . . . . . . . . . . . . . 39
10
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
11
DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
11.1
Ready/Busy signal electrical characteristics . . . . . . . . . . . . . . . . . . . . . . 52
11.2
Data protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54


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