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PI2EQX4402D Datasheet(PDF) 1 Page - Pericom Semiconductor Corporation |
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PI2EQX4402D Datasheet(HTML) 1 Page - Pericom Semiconductor Corporation |
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1 / 8 page  1 PS8873B 11/16/06 Features • Two High Speed PCI Express lanes • Supports PCI Express data rates (2.5 Gbps) on each lane • Adjustable Transmiter De-Emphasis & Amplitude • Adjustable Receiver Equalization • Input Signal Level Detect & Output Squelch on all Channels • Two Spread Spectrum Reference Clock Buffer Outputs • 100Ω Differential CML I/O’s • Low Power (100mW per Channel) • Standby Mode – Power Down State • VDD Operating Range: 1.8V +/-0.1V • Packaging (Pb-free & Green): 84-ball LFBGA (NB84) Description Pericom Semiconductor’s PI2EQX4402D is a low power, PCI Express compliant signal Re-Driver. The device provides programmable equalization, amplification, and de-emphasis by using 7 select bits, SEL[0:6], to optimize performance over a variety of physical mediums by reducing Inter-symbol interference. PI2EQX4402D supports four 100 Differential CML data I/O’s between the Protocol ASIC to a switch fabric, across a backplane, or extends the signals across other distant data pathways on the user’s platform. The integrated equalization circuitry provides flexibility with signal integrity of the PCI Express signal before the Re-Driver. Whereas the integrated de-emphasis circuitry provides flexibility with signal integrity of the PCI Express signal after the Re- Driver. A low-level input signal detection and output squelch function is provided for all four channels. Each channel operates fully independantly. When a channel is enabled (EN_x=1) and operating, that channel input signal level (on xl+/-) determines whether the output is enabled. If the innput level of the channel falls below the active threshold level (Vth-) then the output driver switches off, and the pin is pulled to VDD via a high impedance resistor. In addition to providing signal re-conditioning, Pericom’s PI2EQX4402D also provides power management Stand-by mode operated by an Enable pin. A differential clock buffer is provided for test and other system requirements. This clock function is not used by the data channels. PI2EQX4402D 2.5 Gbps x2 Lane Serial PCI Express Repeater/Equalizer with Signal Detect feature 06-0306 |
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