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EM6156K800TFA-55IF Datasheet(PDF) 1 Page - Eorex Corporation

Part # EM6156K800TFA-55IF
Description  256Kx16 LP SRAM
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Manufacturer  EOREX [Eorex Corporation]
Direct Link  http://www.eorex.com
Logo EOREX - Eorex Corporation

EM6156K800TFA-55IF Datasheet(HTML) 1 Page - Eorex Corporation

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256Kx16 LP SRAM EM6156K600V Series
1
DCC-SR-041003-A
GENERAL DESCRIPTION
The EM6156K600V is a 4,194,304-bit low power CMOS static random access memory organized as
262,144 words by 16 bits. It is fabricated using very high performance, high reliability CMOS
technology. Its standby current is stable within the range of operating temperature.
The EM6156K600V is well designed for low power application, and particularly well suited for battery
back-up nonvolatile memory application.
The EM6156K600V operates from a single power supply of 2.7V ~ 3.6V and all inputs and outputs are
fully TTL compatible
FEATURES
Fast access time: 45/55/70ns
Low power consumption:
Operating current:
40/30/20mA (TYP.)
Standby current: -L/-LL version
20/2µA (TYP.)
Single 2.7V ~ 3.6V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data byte control :
LB# (DQ0 ~ DQ7)
UB# (DQ8 ~ DQ15)
Data retention voltage: 1.5V (MIN.)
Package:
44-pin 400 mil TSOP-II
48-ball 6mm x 8mm TFBGA
FUNCTIONAL BLOCK DIAGRAM
PIN DESCRIPTION
SYMBOL
DESCRIPTION
A0 - A17
Address Inputs
DQ0 – DQ17
Data Inputs/Outputs
CE#
Chip Enable Input
WE#
Write Enable Input
OE#
Output Enable Input
LB#
Lower Byte Control
UB#
Upper Byte Control
Vcc
Power Supply
Vss
Ground
I/O DATA
CURCUIT
COLUMN I/O
CONTROL
CIRCUIT
Vcc
Vss
A0-A17
DQ0-DQ7
Lower Byte
DQ8-DQ15
Upper Byte
CE#
WE#
OE#
LB#
UB#
DECODER
256Kx16
MEMORY
ARRAY


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