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EM48BM3284LBA-75FE Datasheet(PDF) 2 Page - Eorex Corporation |
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EM48BM3284LBA-75FE Datasheet(HTML) 2 Page - Eorex Corporation |
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2 / 20 page  eorex EM48AM3284LBA Jan. 2009 www.eorex.com 2/22 512Mb (4M ×4Bank×32) Synchronous DRAM Features • Fully Synchronous to Positive Clock Edge • VDD= 1.8V +/- 0.1V for 133MHz Power Supply VDD= 1.85V+/- 0.1V for 166MHz . • LVCMOS Compatible with Multiplexed Address • Programmable Burst Length (B/L) - 1, 2, 4, 8 or Full Page • Programmable CAS Latency (C/L) - 2 or 3 • Data Mask (DQM) for Read / Write Masking • Programmable Wrap Sequence – Sequential (B/L = 1/2/4/8/full Page) – Interleave (B/L = 1/2/4/8) • Burst Read with Single-bit Write Operation • Deep Power Down Mode. • Special Function Support. – PASR (Partial Array Self Refresh) – Auto TCSR (Temperature Compensated Self Refresh) • Programmable Driver Strength Control – Full Strength or 1/2, 1/4 of Full Strength • Auto Refresh and Self Refresh • 8,192 Refresh Cycles / 64ms (7.8us) Description The EM48AM3284LBA is Synchronous Dynamic Random Access Memory (SDRAM) organized as 4Meg words x 4 banks by 32 bits. All inputs and outputs are synchronized with the positive edge of the clock. The 512Mb SDRAM uses synchronized pipelined architecture to achieve high speed data transfer rates and is designed to operate at 1.8V low power memory system. It also provides auto refresh with power saving / down mode. All inputs and outputs voltage levels are compatible with LVCMOS. Available packages: TFBGA-90B(10mmx13mm) Ordering Information Part No Package Size Package Type Organize Max. Freq Grade Pb EM48AM3284LBA-75FS Commercial EM48AM3284LBA-75FH 133MHz @CL3 Extend temp. EM48AM3284LBA-6FS Commercial EM48AM3284LBA-6FH (10x13)mm BGA-90B 16M X 32 166MHz @CL3 Extend temp. Free |
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