EM424M1684LBA-7FE datasheet(3/20 Pages) EOREX

Part #	EM424M1684LBA-7FE

Description	512Mb (8M횞4Bank횞16) Double DATA RATE SDRAM

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Manufacturer	EOREX [Eorex Corporation]

Direct Link	http://www.eorex.com

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eorex

EM42BM1684LBA

Jul. 2006

www.eorex.com

Pin Description (Simplified)

Name

Function

G2,G3

CLK,/CLK

(System Clock)

Clock input active on the Positive rising edge except for DQ and

DM are active on both edge of the DQS.

CLK and /CLK are differential clock inputs.

H8

/CS

(Chip Select)

/CS enables the command decoder when ”L” and disable the

command decoder when “H”.The new command are over-

Looked when the command decoder is disabled but previous

operation will still continue.

H1

CKE

(Clock Enable)

Activates the CLK when “H” and deactivates when “L”.

When deactivate the clock,CKE low signifies the power down or

self refresh mode.

K7,L8,L7,M8,M2,

L3,L2,K3,K2,J3,K8,

J2,H2

A0~12

(Address)

Row address (A0 to A12) and Calumn address (CA0 to CA9) are

multiplexed on the same pin.

CA10 defines auto precharge at Calumn address.

J8,J7

BA0, BA1

(Bank Address)

Selects which bank is to be active.

H7

/RAS

(Row Address Strobe)

Latches Row Addresses on the positive rising edge of the CLK with

/RAS “L”. Enables row access & pre-charge.

G8

/CAS

(Column Address Strobe)

Latches Column Addresses on the positive rising edge of the CLK

with /CAS low. Enables column access.

G7

/WE

(Write Enable)

Latches Column Addresses on the positive rising edge of the CLK

with /CAS low. Enables column access.

E7,E3

LDQS,

UDQS

(Data Input/Output)

Data Inputs and Outputs are synchronized with both edge of DQS.

F7,F8

LDM,UDM

(Data Input/Output Mask)

DM controls data inputs.LDM corresponds to the data on

DQ0~DQ7.UDM corresponds to the data on DQ8~DQ15……..

A8,B9,B7,C9

C7,D9,D7,E9

E1,D3,D1,C3

C1,B3,B1,A2

DQ0~15

(Data Input/Output)

Data inputs and outputs are multiplexed on the same pin.

A7,F8,M7/

A3,F2,M3

VDD/VSS

(Power Supply/Ground)

VDD and VSS are power supply pins for internal circuits.

A9,B1,C8,D2,E8 /

A1,B8,C2,D8,E2,

VDDQ/VSSQ

(Power Supply/Ground)

VDDQ and VSSQ are power supply pins for the output buffers.

F1,F9

NC/RFU

(No Connection/Reserved for Future Use)

This pin is recommended to be left No Connection on the device.

3/20

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