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EM428M1684RTA-7FE Datasheet(PDF) 7 Page - Eorex Corporation |
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EM428M1684RTA-7FE Datasheet(HTML) 7 Page - Eorex Corporation |
7 / 19 page eorex EM42BM1684RTA Jul. 2006 www.eorex.com 7/19 AC Operating Test Conditions (VDD=2.5V±0.2V, TA=0°C ~70°C) Item Conditions Output Reference Level 1.25V/1.25V Output Load See diagram as below Input Signal Level VREF+0.31V/ VREF-0.31V Transition Time of Input Signals 1ns Input Reference Level VDDQ/2 AC Operating Test Characteristics (VDD=2.5V±0.2V, TA=0°C ~70°C) -5 -6 -7.5 Symbol Parameter Min. Max. Min. Max. Min. Max. Units tDQCK DQ output access from CLK,/CLK -0.65 0.65 -0.7 0.7 -0.75 0.75 ns tDQSCK DQS output access from CLK,/CLK -0.55 0.55 -0.6 0.6 -0.75 0.75 ns tCL,tCH CL low/high level width 0.45 0.55 0.45 0.55 0.45 0.55 tCK CL=2 - - 7.5 12 10 12 ns CL=2.5 6 12 6 12 7.5 12 ns tCK Clock Cycle Time CL=3 5 12 - - - - ns tDH,tDS DQ and DM hold/setup time 0.4 0.45 0.5 ns tDIPW DQ and DM input pulse width for each input 1.75 1.75 1.75 ns tHZ,tLZ Data out high/low impedance time from CLK,/CLK -0.7 0.7 -0.7 0.7 -0.75 0.75 ns tDQSQ DQS-DQ skew for associated DQ signal 0.4 0.45 0.5 ns tDQSS Write command to first latching DQS transition 0.7 1.25 0.75 1.25 0.75 1.25 tCK tDSL,tDS H DQS input valid window 0.35 0.35 0.35 tCK tMRD Mode Register Set command cycle time 2 2 2 tCK tWPRES Write Preamble setup time 0 0 0 ns tWPST Write Preamble 0.4 0.6 0.4 0.6 0.4 0.6 tCK tIH,tIS Address/control input hold/setup time 0.7 0.8 1.0 ns tRPRE Read Preamble 0.9 1.1 0.9 1.1 0.9 1.1 tCK |
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