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TMX320F28232ZHHA Datasheet(PDF) 3 Page - Texas Instruments |
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TMX320F28232ZHHA Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 170 page  TMS320F28335, TMS320F28334, TMS320F28332 TMS320F28235, TMS320F28234, TMS320F28232 Digital Signal Controllers (DSCs) SPRS439C – JUNE 2007 – REVISED FEBRUARY 2008 4.7.1 ADC Connections if the ADC Is Not Used ................................................................... 77 4.7.2 ADC Registers ................................................................................................... 77 4.7.3 ADC Calibration .................................................................................................. 78 4.8 Multichannel Buffered Serial Port (McBSP) Module ................................................................... 79 4.9 Enhanced Controller Area Network (eCAN) Modules (eCAN-A and eCAN-B) ..................................... 82 4.10 Serial Communications Interface (SCI) Modules (SCI-A, SCI-B, SCI-C) ........................................... 87 4.11 Serial Peripheral Interface (SPI) Module (SPI-A) ...................................................................... 91 4.12 Inter-Integrated Circuit (I2C) .............................................................................................. 94 4.13 GPIO MUX .................................................................................................................. 96 4.14 External Interface (XINTF) ............................................................................................... 101 5 Device Support ................................................................................................................. 104 5.1 Device and Development Support Tool Nomenclature .............................................................. 104 5.2 Documentation Support .................................................................................................. 106 6 Electrical Specifications .................................................................................................... 109 6.1 Absolute Maximum Ratings ............................................................................................. 109 6.2 Recommended Operating Conditions .................................................................................. 110 6.3 Electrical Characteristics ................................................................................................ 110 6.4 Current Consumption ..................................................................................................... 111 6.4.1 Reducing Current Consumption ............................................................................. 113 6.4.2 Current Consumption Graphs ................................................................................ 114 6.4.2.1 Thermal Design Considerations .............................................................................. 115 6.5 Emulator Connection Without Signal Buffering for the DSP ........................................................ 115 6.6 Timing Parameter Symbology ........................................................................................... 116 6.6.1 General Notes on Timing Parameters ....................................................................... 116 6.6.2 Test Load Circuit .............................................................................................. 116 6.6.3 Device Clock Table ........................................................................................... 116 6.7 Clock Requirements and Characteristics ............................................................................. 118 6.8 Power Sequencing ........................................................................................................ 119 6.8.1 Power Management and Supervisory Circuit Solutions ................................................... 119 6.9 General-Purpose Input/Output (GPIO) ................................................................................. 122 6.9.1 GPIO - Output Timing ......................................................................................... 122 6.9.2 GPIO - Input Timing ........................................................................................... 123 6.9.3 Sampling Window Width for Input Signals .................................................................. 124 6.9.4 Low-Power Mode Wakeup Timing ........................................................................... 125 6.10 Enhanced Control Peripherals .......................................................................................... 128 6.10.1 Enhanced Pulse Width Modulator (ePWM) Timing ........................................................ 128 6.10.2 Trip-Zone Input Timing ........................................................................................ 128 6.10.3 External Interrupt Timing ...................................................................................... 130 6.10.4 I2C Electrical Specification and Timing ..................................................................... 131 6.10.5 Serial Peripheral Interface (SPI) Master Mode Timing .................................................... 131 6.10.6 SPI Slave Mode Timing ....................................................................................... 135 6.10.7 External Interface (XINTF) Timing ........................................................................... 137 6.10.7.1 USEREADY = 0 .................................................................................... 138 6.10.7.2 Synchronous Mode (USEREADY = 1, READYMODE = 0) .................................. 138 6.10.7.3 Asynchronous Mode (USEREADY = 1, READYMODE = 1) ................................. 139 6.10.7.4 XINTF Signal Alignment to XCLKOUT .......................................................... 140 6.10.7.5 External Interface Read Timing .................................................................. 141 6.10.7.6 External Interface Write Timing .................................................................. 142 6.10.7.7 External Interface Ready-on-Read Timing With One External Wait State ................. 143 6.10.7.8 External Interface Ready-on-Write Timing With One External Wait State ................. 147 6.10.8 XHOLD and XHOLDA Timing ................................................................................ 149 6.10.9 On-Chip Analog-to-Digital Converter ........................................................................ 152 Contents 3 |
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