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74HCT137 Datasheet(PDF) 7 Page - NXP Semiconductors |
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74HCT137 Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 8 page December 1990 7 Philips Semiconductors Product specification 3-to-8 line decoder/demultiplexer with address latches; inverting 74HC/HCT137 AC WAVEFORMS Fig.6 Waveforms showing the address input (An) and enable inputs (E2) to output (Yn) propagation delays and the output transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.7 Waveforms showing the enable input (E1, LE) to output (Yn) propagation delays and the output transition times. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.8 Waveforms showing the data set-up, hold times for An input to LE input and the latch enable pulse width. The shaded areas indicate when the input is permitted to change for predictable output performance. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. APPLICATION INFORMATION Fig.9 6-to-64 line decoder with input address storage. |
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