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LVDS Clock Oscillator
CCLD-033 5x7mm SMD
Rev.: D
Date: 10-10-07
Frequency Range:
77.760Mhz to 161.000Mhz
Frequency Stability Options(ppm):
±20, ±25, ±50, ±100
Temperature Range: (standard)
0°C to +70°C
(Option M)
-20°C to +70°C
(Option X)
-40°C to +85°C
Storage:
-55°C to 120°C
Input Voltage:
3.3V ± 0.3V
Input Current:
45mA Typ., 66mA Max
Output:
Differential LVDS
Symmetry:
45/55% Max @ 50%Vdd
Rise/Fall Time:
1nsec Max @ 20% to 80% Vdd
Load: 100 Ohms
Connected between OUT and COUT
Logic:
Output Voltage Levels “0”=0.90 Min., 1.10 Typ.
“1”=1.43 Typ., 1.60 Max
Differential Output Voltage:
247mV Min., 454mV Max
Disable Time
200nSec Max
Enable Time
2mSec Max
Phase Jitter:
12KHz~80MHz
0.5psec Typ., 1psec RMS Max
Phase Noise:
(See Plot Below)
Sub-harmonics:
None
Aging:
<3ppm 1st/yr, <1ppm every year thereafter
Typical Phase Noise Plot
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