List of Tables
Table 1.
Documentation Conventions ............................................................................................ 19
Table 3-1.
Memory Map ................................................................................................................... 41
Table 4-1.
Exception Types .............................................................................................................. 43
Table 4-2.
Interrupts ........................................................................................................................ 44
Table 5-1.
JTAG Port Pins Reset State ............................................................................................. 48
Table 5-2.
JTAG Instruction Register Commands ............................................................................... 53
Table 6-1.
System Control Register Map ........................................................................................... 63
Table 7-1.
Hibernation Module Register Map ................................................................................... 122
Table 8-1.
Flash Protection Policy Combinations ............................................................................. 138
Table 8-2.
Flash Resident Registers ............................................................................................... 139
Table 8-3.
Flash Register Map ........................................................................................................ 139
Table 9-1.
GPIO Pad Configuration Examples ................................................................................. 163
Table 9-2.
GPIO Interrupt Configuration Example ............................................................................ 164
Table 9-3.
GPIO Register Map ....................................................................................................... 165
Table 10-1.
16-Bit Timer With Prescaler Configurations ..................................................................... 205
Table 10-2.
Timers Register Map ...................................................................................................... 211
Table 11-1.
Watchdog Timer Register Map ........................................................................................ 238
Table 12-1.
Samples and FIFO Depth of Sequencers ........................................................................ 261
Table 12-2.
ADC Register Map ......................................................................................................... 265
Table 13-1.
UART Register Map ....................................................................................................... 299
Table 14-1.
SSI Register Map .......................................................................................................... 345
Table 15-1.
Examples of I
2C Master Timer Period versus Speed Mode ............................................... 374
Table 15-2.
Inter-Integrated Circuit (I
2C) Interface Register Map ......................................................... 383
Table 15-3.
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 388
Table 16-1.
Comparator 0 Operating Modes ...................................................................................... 408
Table 16-2.
Comparator 1 Operating Modes ..................................................................................... 408
Table 16-3.
Comparator 2 Operating Modes ...................................................................................... 409
Table 16-4.
Internal Reference Voltage and ACREFCTL Field Values ................................................. 409
Table 16-5.
Analog Comparators Register Map ................................................................................. 411
Table 17-1.
PWM Register Map ........................................................................................................ 424
Table 18-1.
QEI Register Map .......................................................................................................... 459
Table 20-1.
Signals by Pin Number ................................................................................................... 473
Table 20-2.
Signals by Signal Name ................................................................................................. 477
Table 20-3.
Signals by Function, Except for GPIO ............................................................................. 482
Table 20-4.
GPIO Pins and Alternate Functions ................................................................................. 486
Table 21-1.
Temperature Characteristics ........................................................................................... 488
Table 21-2.
Thermal Characteristics ................................................................................................. 488
Table 22-1.
Maximum Ratings .......................................................................................................... 489
Table 22-2.
Recommended DC Operating Conditions ........................................................................ 489
Table 22-3.
LDO Regulator Characteristics ....................................................................................... 490
Table 22-4.
Flash Memory Characteristics ........................................................................................ 490
Table 22-5.
Phase Locked Loop (PLL) Characteristics ....................................................................... 491
Table 22-6.
Clock Characteristics ..................................................................................................... 491
Table 22-7.
Crystal Characteristics ................................................................................................... 491
Table 22-8.
ADC Characteristics ....................................................................................................... 492
Table 22-9.
Analog Comparator Characteristics ................................................................................. 492
September 02, 2007
10
Preliminary
Table of Contents