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SH7124 Datasheet(PDF) 10 Page - Renesas Technology Corp |
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SH7124 Datasheet(HTML) 10 Page - Renesas Technology Corp |
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10 / 782 page  Rev. 3.00 Sep. 27, 2007 Page x of xx 3.4 Address Map ........................................................................................................................ 51 3.5 Initial State in This LSI........................................................................................................ 54 3.6 Note on Changing Operating Mode ..................................................................................... 54 Section 4 Clock Pulse Generator (CPG) ............................................................. 55 4.1 Features................................................................................................................................ 55 4.2 Input/Output Pins ................................................................................................................. 58 4.3 Clock Operating Mode......................................................................................................... 59 4.4 Register Descriptions ...........................................................................................................61 4.4.1 Frequency Control Register (FRQCR) ................................................................... 61 4.4.2 Oscillation Stop Detection Control Register (OSCCR) .......................................... 64 4.5 Changing Frequency ............................................................................................................ 65 4.6 Oscillator.............................................................................................................................. 66 4.6.1 Connecting Crystal Resonator ................................................................................ 66 4.6.2 External Clock Input Method.................................................................................. 67 4.7 Function for Detecting Oscillator Stop ................................................................................ 68 4.8 Usage Notes ......................................................................................................................... 69 4.8.1 Note on Crystal Resonator ...................................................................................... 69 4.8.2 Notes on Board Design ........................................................................................... 69 Section 5 Exception Handling ............................................................................. 71 5.1 Overview.............................................................................................................................. 71 5.1.1 Types of Exception Handling and Priority ............................................................. 71 5.1.2 Exception Handling Operations .............................................................................. 72 5.1.3 Exception Handling Vector Table .......................................................................... 73 5.2 Resets ................................................................................................................................... 75 5.2.1 Types of Resets....................................................................................................... 75 5.2.2 Power-On Reset ...................................................................................................... 75 5.2.3 Manual Reset .......................................................................................................... 76 5.3 Address Errors ..................................................................................................................... 77 5.3.1 Address Error Sources ............................................................................................ 77 5.3.2 Address Error Exception Source............................................................................. 78 5.4 Interrupts.............................................................................................................................. 79 5.4.1 Interrupt Sources..................................................................................................... 79 5.4.2 Interrupt Priority ..................................................................................................... 80 5.4.3 Interrupt Exception Handling ................................................................................. 80 5.5 Exceptions Triggered by Instructions .................................................................................. 81 5.5.1 Types of Exceptions Triggered by Instructions ...................................................... 81 5.5.2 Trap Instructions ..................................................................................................... 81 5.5.3 Illegal Slot Instructions........................................................................................... 82 |
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